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This replaces instances of manually constructed expressions by their proper constructors in the Verilog synthesis code.

This replaces instances of manually constructed expressions by their proper
constructors in the Verilog synthesis code.
@kroening kroening marked this pull request as ready for review October 23, 2025 23:27
exprt bit_extract(ID_extractbit, it->type());
bit_extract.add_to_operands(rhs);
bit_extract.add_to_operands(offset_constant);
exprt bit_extract = extractbit_exprt{rhs, offset_constant};
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Any reason not to use

Suggested change
exprt bit_extract = extractbit_exprt{rhs, offset_constant};
extractbit_exprt bit_extract{rhs, offset_constant};

instead? Equally applies to all changes below.

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