Skip to content

DSP techmap fixes and test coverage #59

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
gigeresk wants to merge 3 commits into
base: main
Choose a base branch
from
Open

DSP techmap fixes and test coverage #59

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
528c267
Fix reset
gigeresk Apr 2, 2026
b50a60d
Add testing cov and fix efpga_macc
gigeresk Apr 2, 2026
43b9db2
Add 0 assertion to combinational modes
gigeresk Apr 2, 2026
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 2 additions & 0 deletions architecture/z1010/dsp/zeroasic_dsp_map_mode.v
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -133,6 +133,8 @@ generate
efpga_macc _TECHMAP_REPLACE_ (
.a(A),
.b(B),
.clk(CLK),
.resetn(resetn),
.y(P)
);
end
Expand Down
2 changes: 2 additions & 0 deletions architecture/z1060/dsp/zeroasic_dsp_map_mode.v
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -133,6 +133,8 @@ generate
efpga_macc _TECHMAP_REPLACE_ (
.a(A),
.b(B),
.clk(CLK),
.resetn(resetn),
.y(P)
);
end
Expand Down
14 changes: 14 additions & 0 deletions src/zeroasic_dsp.cc
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -141,6 +141,20 @@ void zeroasic_dsp_pack(zeroasic_dsp_pm &pm) {
f(P, st.ffP, ID(P_EN), ID(P_ARST_N), ID(ALLOW_P_REG), ID(P_REG));
st.ffP->connections_.at(ID::Q).replace(
st.sigP, pm.module->addWire(NEW_ID, GetSize(st.sigP)));

// Set resetn from ffP when A/B registers were not packed (the A/B block
// above only runs when ffA && ffB, so resetn would otherwise be undriven
// for the output-register-only case, e.g. efpga_mult_rego).
if (!st.ffA) {
if (st.ffP->type.in(ID($adff), ID($adffe))) {
SigSpec arst = st.ffP->getPort(ID::ARST);
bool rstpol_n = !st.ffP->getParam(ID::ARST_POLARITY).as_bool();
cell->setPort(ID(resetn),
rstpol_n ? arst : pm.module->Not(NEW_ID, arst));
} else {
cell->setPort(ID(resetn), State::S1);
}
}
}

log(" clock: %s (%s)\n", log_signal(st.clock), "posedge");
Expand Down
Binary file added tests/unit/dsp/heaptrack.yosys.463040.zst
View file
Open in desktop
Binary file not shown.
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_macc.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -31,3 +31,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_macc
select -assert-count 1 */t:efpga_macc %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_macc %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_macc_pipe.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -38,3 +38,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_macc_pipe
select -assert-count 1 */t:efpga_macc_pipe %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_macc_pipe %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_macc_pipe_regi.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -52,3 +52,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_macc_pipe_regi
select -assert-count 1 */t:efpga_macc_pipe_regi %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_macc_pipe_regi %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_macc_pipe_regi_unsigned.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -52,3 +52,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_macc_pipe_regi
select -assert-count 1 */t:efpga_macc_pipe_regi %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_macc_pipe_regi %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_macc_pipe_unsigned.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -38,3 +38,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_macc_pipe
select -assert-count 1 */t:efpga_macc_pipe %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_macc_pipe %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_macc_regi.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -45,3 +45,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_macc_regi
select -assert-count 1 */t:efpga_macc_regi %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_macc_regi %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_macc_regi_unsigned.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -45,3 +45,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_macc_regi
select -assert-count 1 */t:efpga_macc_regi %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_macc_regi %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_macc_unsigned.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -31,3 +31,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_macc
select -assert-count 1 */t:efpga_macc %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_macc %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_mult.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -18,3 +18,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_mult
select -assert-count 0 */t:efpga_mult %x:+[clk] */w:clk %i
select -assert-count 0 */t:efpga_mult %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_mult_addc.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -20,3 +20,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_mult_addc
select -assert-count 0 */t:efpga_mult_addc %x:+[clk] */w:clk %i
select -assert-count 0 */t:efpga_mult_addc %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_mult_addc_regi.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -39,3 +39,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_mult_addc_regi
select -assert-count 1 */t:efpga_mult_addc_regi %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_mult_addc_regi %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_mult_addc_regi_unsigned.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -39,3 +39,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_mult_addc_regi
select -assert-count 1 */t:efpga_mult_addc_regi %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_mult_addc_regi %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_mult_addc_regio.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -46,3 +46,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_mult_addc_regio
select -assert-count 1 */t:efpga_mult_addc_regio %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_mult_addc_regio %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_mult_addc_regio_unsigned.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -46,3 +46,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_mult_addc_regio
select -assert-count 1 */t:efpga_mult_addc_regio %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_mult_addc_regio %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_mult_addc_rego.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -29,3 +29,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_mult_addc_rego
select -assert-count 1 */t:efpga_mult_addc_rego %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_mult_addc_rego %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_mult_addc_rego_unsigned.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -29,3 +29,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_mult_addc_rego
select -assert-count 1 */t:efpga_mult_addc_rego %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_mult_addc_rego %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_mult_addc_unsigned.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -20,3 +20,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_mult_addc
select -assert-count 0 */t:efpga_mult_addc %x:+[clk] */w:clk %i
select -assert-count 0 */t:efpga_mult_addc %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_mult_regi.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -34,3 +34,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_mult_regi
select -assert-count 1 */t:efpga_mult_regi %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_mult_regi %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_mult_regi_unsigned.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -34,3 +34,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_mult_regi
select -assert-count 1 */t:efpga_mult_regi %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_mult_regi %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_mult_regio.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -41,3 +41,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_mult_regio
select -assert-count 1 */t:efpga_mult_regio %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_mult_regio %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_mult_regio_unsigned.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -41,3 +41,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_mult_regio
select -assert-count 1 */t:efpga_mult_regio %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_mult_regio %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_mult_rego.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -27,3 +27,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_mult_rego
select -assert-count 1 */t:efpga_mult_rego %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_mult_rego %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_mult_rego_unsigned.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -27,3 +27,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_mult_rego
select -assert-count 1 */t:efpga_mult_rego %x:+[clk] */w:clk %i
select -assert-count 1 */t:efpga_mult_rego %x:+[resetn] */w:resetn %i
2 changes: 2 additions & 0 deletions tests/unit/dsp/mae-techmap-efpga_mult_unsigned.ys
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -18,3 +18,5 @@ EOF

synth_fpga -partname z1010
select -assert-count 1 */t:efpga_mult
select -assert-count 0 */t:efpga_mult %x:+[clk] */w:clk %i
select -assert-count 0 */t:efpga_mult %x:+[resetn] */w:resetn %i
Loading