riscv: add the mvien + mvienh CSR

[0xllx0]

Adds the mvien + mvienh CSR to represent the Machine Virtual Interrupt Enable registers.

Related: #1, #226

[romancardenas]

I'm not sure about this. Take a look at mie: https://github.com/rust-embedded/riscv/blob/master/riscv/src/register/mie.rs

As each bit is a field, we probably prefer to use something like that.

[romancardenas]

Also, for composite registers, we might want to use this:

riscv/riscv/src/register/instret.rs

Line 8 in 8499f1a

read_composite_csr!(super::instreth::read(), read());

[0xllx0]

As each bit is a field, we probably prefer to use something like that.

Thanks, I applied the naming, and patterns from mie. It's not a 1-to-1, since some of mie fields are not valid in mvien.

I also applied the changes as fixup commits. After final review, I'll squash all the commits down to one.

Also, for composite registers, we might want to use this

Thanks for the suggestion, but I don't think this applies. Since we aren't reading the value as a usize/u64, using this will throw a compile error.

However, I did add the field helpers from Mvien to the Mvienh type. If we still want to read the raw u64 value, I guess we could use the unsafe _read() read().bits() methods.

[romancardenas]

What do you think about returning results to notify users about potential issues with their interrupt enum?

[romancardenas]

We might prefer to return a riscv::Result<()> to notify users that the interrupt has been effectively enabled. What do you think?

[0xllx0]

SGTM, I'll switch the methods to be fallible, and document the error conditions.

[romancardenas]

Same here

[romancardenas]

Same here

[romancardenas]

Same here

[0xllx0]

What do you think about returning results to notify users about potential issues with their interrupt enum?

I think this is a good idea. Do you think we should also provide an example VirtualInterrupt enum, something like:

pub struct VirtualInterrupt {
    SupervisorSoftware = 1,
    SupervisorTimer = 5,
    SupervisorExternal = 9,
    Interrupt(RangedUsize<13, 63>),
}

/// SAFETY: `Interrupt` represents the virtual RISC-V interrupts
unsafe impl InterruptNumber for VirtualInterrupt {
    const MAX_INTERRUPT_NUMBER: usize = Mvien::MAX_INTERRUPT;

    #[inline]
    fn number(self) -> usize {
        match self {
            Self::SupervisorSoftware => 1,
            Self::SupervisorTimer => 5,
            Self::SupervisorExternal => 9,
            Self::Interrupt(int) => int.inner(),
        }
    }

    #[inline]
    fn from_number(value: usize) -> Result<Self> {
        match value {
            1 => Ok(Self::SupervisorSoftware),
            5 => Ok(Self::SupervisorTimer),
            9 => Ok(Self::SupervisorExternal),
            _ => RangedUsize::try_from(value).map(Self::Interrupt),
        }
    }
}

Maybe this is better left to higher-level libraries?