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ggml-cpu: extend RVV quantization vec dot to higher VLENs CI (riscv) #54: Pull request #10 synchronize by taimur-10x
1h 28m 26s 10x/riscv-quant-vec-dot-vlens
10x/riscv-quant-vec-dot-vlens
1h 28m 26s
ggml-cpu: extend RVV quantization vec dot to higher VLENs CI (riscv) #53: Pull request #10 synchronize by taimur-10x
1h 6m 14s 10x/riscv-quant-vec-dot-vlens
10x/riscv-quant-vec-dot-vlens
1h 6m 14s
ggml-cpu: extend RVV quantization vec dot to higher VLENs CI (riscv) #52: Pull request #10 synchronize by taimur-10x
43m 54s 10x/riscv-quant-vec-dot-vlens
10x/riscv-quant-vec-dot-vlens
43m 54s
ggml-cpu: extend RVV quantization vec dot to higher VLENs CI (riscv) #51: Pull request #10 synchronize by taimur-10x
1h 8m 59s 10x/riscv-quant-vec-dot-vlens
10x/riscv-quant-vec-dot-vlens
1h 8m 59s
model : don't crash on unsupported architecture (#22742) CI (riscv) #50: Commit 5207d12 pushed by luhenry
1h 24m 16s master
master
1h 24m 16s
Merge branch 'ggml-org:master' into master CI (riscv) #49: Commit 143d35e pushed by taimur-10x
2h 40m 22s master
master
2h 40m 22s
ggml-cpu: extend RVV quantization vec dot to higher VLENs CI (riscv) #48: Pull request #10 synchronize by taimur-10x
50m 59s 10x/riscv-quant-vec-dot-vlens
10x/riscv-quant-vec-dot-vlens
50m 59s
ggml-cpu: add RVV repack GEMM and GEMV for Q3_K, Q6_K CI (riscv) #47: Pull request #12 synchronize by taimur-10x
44m 1s 10x/riscv-quant-repack-k
10x/riscv-quant-repack-k
44m 1s
ggml-cpu: add RVV repack GEMM and GEMV for Q3_K, Q6_K CI (riscv) #46: Pull request #12 synchronize by taimur-10x
44m 0s 10x/riscv-quant-repack-k
10x/riscv-quant-repack-k
44m 0s
ggml-cpu: extend RVV quantization vec dot to higher VLENs CI (riscv) #45: Pull request #10 synchronize by taimur-10x
51m 45s 10x/riscv-quant-vec-dot-vlens
10x/riscv-quant-vec-dot-vlens
51m 45s
Merge branch 'ggml-org:master' into master CI (riscv) #44: Commit 4e13bd8 pushed by taimur-10x
2h 1m 3s master
master
2h 1m 3s
ggml-cpu: extend RVV quantization vec dot to higher VLENs CI (riscv) #43: Pull request #10 synchronize by taimur-10x
45m 37s 10x/riscv-quant-vec-dot-vlens
10x/riscv-quant-vec-dot-vlens
45m 37s
ci: Merge ubuntu-cpu-riscv64-native into ubuntu-cpu job CI (riscv) #42: Commit 019b323 pushed by luhenry
1m 27s master
master
1m 27s
ci: Merge ubuntu-cpu-riscv64-native into ubuntu-cpu job CI (riscv) #41: Commit d704540 pushed by luhenry
15m 10s master
master
15m 10s
CI (riscv) CI (riscv) #40: Manually run by luhenry
4m 8s master
master
4m 8s
CI (riscv) CI (riscv) #39: Manually run by luhenry
11m 43s master
master
11m 43s
CI (riscv) CI (riscv) #38: Manually run by luhenry
12m 50s master
master
12m 50s
Use ggml-org/ccache-action on RISC-V as well CI (riscv) #37: Commit b7100c5 pushed by luhenry
54m 26s master
master
54m 26s
Use ggml-org/ccache-action on RISC-V as well CI (riscv) #36: Commit 857d636 pushed by luhenry
2h 13m 30s master
master
2h 13m 30s
Update build-riscv.yml CI (riscv) #35: Commit 6271242 pushed by luhenry
1h 30m 58s master
master
1h 30m 58s
CI (riscv) CI (riscv) #34: Manually run by luhenry
2h 2m 1s riscv64-ccache
riscv64-ccache
2h 2m 1s
vulkan: add FA dequant for q4_1, q5_0, q5_1, iq4_nl (#21029) CI (riscv) #33: Commit edd4d9b pushed by taimur-10x
3h 14m 21s master
master
3h 14m 21s
webui : store reasoning_content so it is sent back in subsequent requ… CI (riscv) #32: Commit 482192f pushed by taimur-10x
1h 20m 57s master
master
1h 20m 57s
CI (riscv) CI (riscv) #31: Manually run by luhenry
1h 25m 23s ccache
ccache
1h 25m 23s
CI (riscv) CI (riscv) #30: Manually run by luhenry
39m 51s ccache
ccache
39m 51s