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Internal feedback #7

bcstrongx wants to merge 27 commits into from
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@bcstrongx bcstrongx commented Dec 19, 2025

Incorporate feedback from @IainCRobertson (issue #3 ) and @ganboing (issue #5 ), as well as TG discussion. Primary changes:

  • Consolidate AMB pre-translation guidance in a single new section, rather than a distributed set of non-normative comments. And make it required.
  • Add a section on AMB translation caching and invalidation.
  • Move some bits around in sambcs for each of use with CSRR*I
  • Add a new appendix on handling LAMBIs
  • Add a new appendix on self-hosted trace configurations for various scenarios
  • Add text to the priv ISA spec regarding requirements for invalidating AMB page translations
  • Add introductions to both STRC and AMB chapters

Beeman Strong and others added 26 commits December 8, 2025 10:15
move f0s_width param to support packet
1f106a0
@bcstrongx
asyncmbuf: first crack at LAMBI handling guidance
5c95f6f
@bcstrongx
asyncmbuf: update LAMBI handling
0087e3c
@bcstrongx
asyncmcbuf: replace patchwork set of non-normative comments about pre…
91bb1f2 
…-translation with an appendix the details the whole process
@bcstrongx
smstrc: fix incompatibility with RHTI priv encodings
767a357
@bcstrongx
asyncmcbuf: simplify, no need to take guest-page faults when V=0
43aae6e
@bcstrongx
asyncmcbuf: minor clarification
63a5d15
@bcstrongx
supervisor: add AMB details to SFENCE.VMA def
9d0b0ff
@bcstrongx
supervisor: improve AMB details in SFENCE.VMA def
4d49a27
@bcstrongx
asynchmbuf: add chapter on translation caching
7901c2a
@bcstrongx
supervisor: add AMB TLB inval details
273cfc0
@bcstrongx
hypervisor: add AMB TLB inval details, and htinst updates
48dbedf
@bcstrongx
asyncmbuf: make pre-translation required
6520dd1
@bcstrongx
asyncmbuf: replace recommend with should
aa2967e
@bcstrongx
smstrc: accommmodate N-trace in context desc
47aa779
@bcstrongx
smstrc: add appendix with configuration scenarios
a504bdd
@bcstrongx
smstrc: add reference to TCI appendix in mstrcctl desc
41a3036
@bcstrongx
smstrc: require pre-trans suspension to avoid destrutive nested faults
42f21a2
@bcstrongx
asymcmbuf: move TF and BMI bits to lower bits to support CSRR*I write…
1f4bdc9 
…s, and other minor improvements
@bcstrongx
asymcmbuf: minor fix re: required pre-trans
4242505
@bcstrongx
smstrc: add an introduction, including explaining the extension names
49ad984
@bcstrongx
smstrc: fix instatiation typo
05eadec
@bcstrongx
smstrc: minor improvements
645608b
@bcstrongx
smstrc/asyncmbuf: minor text improvements
be89303
@bcstrongx
smstrc: fix ecause_width_p value for issue #3
266e149
@bcstrongx
restore Makefile
811afd8
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bcstrongx commented Dec 19, 2025

riscv-strc.pdf
Attached is the pdf for the stand-alone spec, which includes on the new chapters for Smstrc*/Ssstrc* and Ssamb. It does not include changes to the priv ISA spec (for xFENCE instructions).

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