Qualcomm AI Engine Direct - supprot SAR2230P

backends/qualcomm/README.md

@@ -28,6 +28,7 @@ Please check `generate_qnn_executorch_compiler_spec()` in
 - SXR2230P
 - SXR2330P
 - QCS9100
+- SAR2230P
 
 ### Adding more supported Chipset
 Currently, users cannot add additional chipset models because the chipset ID is not accessible to community users. If you have specific chipset models you wish to add, please contact one of the authors in the `Code Reviews` section at the bottom of this page.

backends/qualcomm/serialization/qc_compiler_spec.fbs

@@ -18,6 +18,7 @@ enum HtpArch: int {
   V73 = 73,
   V75 = 75,
   V79 = 79,
+  V81 = 81,
 }
 
 table HtpInfo {
@@ -44,6 +45,7 @@ enum QcomChipset: int {
   SXR2230P = 53,
   SXR2330P = 75,
   QCS9100 = 77,
+  SAR2230P = 95,
 }
 
 /// Indicate the information of the specified SoC.

backends/qualcomm/serialization/qc_schema.py

@@ -27,6 +27,7 @@ class HtpArch(IntEnum):
     V73 = 73
     V75 = 75
     V79 = 79
+    V81 = 81
 
 
 @dataclass
@@ -50,6 +51,7 @@ class QcomChipset(IntEnum):
     SXR2230P = 53  # v69
     SXR2330P = 75  # v79
     QCS9100 = 77  # v73
+    SAR2230P = 95  # v81
 
 
 @dataclass
@@ -71,6 +73,7 @@ class SocInfo:
     QcomChipset.SXR2230P: SocInfo(QcomChipset.SXR2230P, HtpInfo(HtpArch.V69, 8)),
     QcomChipset.SXR2330P: SocInfo(QcomChipset.SXR2330P, HtpInfo(HtpArch.V79, 8)),
     QcomChipset.QCS9100: SocInfo(QcomChipset.QCS9100, HtpInfo(HtpArch.V73, 8)),
+    QcomChipset.SAR2230P: SocInfo(QcomChipset.SAR2230P, HtpInfo(HtpArch.V81, 4)),
 }
 
 

backends/qualcomm/utils/utils.py

@@ -1100,6 +1100,7 @@ def get_soc_to_arch_map():
         "SXR2230P": HtpArch.V69,
         "SXR2330P": HtpArch.V79,
         "QCS9100": HtpArch.V73,
+        "SAR2230P": HtpArch.V81,
     }
 
 
@@ -1117,6 +1118,7 @@ def get_soc_to_chipset_map():
         "SXR2230P": QcomChipset.SXR2230P,
         "SXR2330P": QcomChipset.SXR2330P,
         "QCS9100": QcomChipset.QCS9100,
+        "SAR2230P": QcomChipset.SAR2230P,
     }