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ci: Add slang action #171

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398efd7
ci: Cancel on new pushes
fischeti Apr 1, 2026
9d099f7
ci: Add slang workflow
fischeti Apr 1, 2026
01936f1
ci: Bump pulp-actions
fischeti Apr 1, 2026
363eaf1
hw: Fix slang error and warnings
fischeti Apr 1, 2026
c3427f1
ci: Exclude `fpnew` and dependency warnings
fischeti Apr 1, 2026
58b66c1
ci: Bump checkout action
fischeti Apr 2, 2026
e9d8dab
fix: Remove duplicate/deprecated sources
fischeti Apr 2, 2026
fbc8090
fix: Add missing ports in nw_router templates
fischeti Apr 2, 2026
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4 changes: 4 additions & 0 deletions .github/workflows/floogen.yml
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Expand Up @@ -13,6 +13,10 @@ on:
- main
- develop

concurrency:
group: ${{ github.workflow }}-${{ github.ref }}
cancel-in-progress: true

jobs:

unit-test-pip:
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6 changes: 5 additions & 1 deletion .github/workflows/gitlab-ci.yml
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Expand Up @@ -13,12 +13,16 @@ on:
- main
- develop

concurrency:
group: ${{ github.workflow }}-${{ github.ref }}
cancel-in-progress: true

jobs:
check:
runs-on: ubuntu-latest
steps:
- name: Mirror and check
uses: pulp-platform/pulp-actions/gitlab-ci@v2.4.5
uses: pulp-platform/pulp-actions/gitlab-ci@v2.5.0
# Skip on forks or pull requests from forks due to missing secrets.
if: >
github.repository == 'pulp-platform/FlooNoC' &&
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8 changes: 6 additions & 2 deletions .github/workflows/lint.yml
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Expand Up @@ -13,6 +13,10 @@ on:
- main
- develop

concurrency:
group: ${{ github.workflow }}-${{ github.ref }}
cancel-in-progress: true

jobs:

################
Expand All @@ -21,7 +25,7 @@ jobs:
verible-lint:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v4
- uses: actions/checkout@v6
- uses: chipsalliance/verible-linter-action@main
with:
config_file: ''
Expand All @@ -47,5 +51,5 @@ jobs:
reuse:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v4
- uses: actions/checkout@v6
- uses: fsfe/reuse-action@v5
56 changes: 56 additions & 0 deletions .github/workflows/slang.yml
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@@ -0,0 +1,56 @@
# Copyright 2026 ETH Zurich and University of Bologna.
# Solderpad Hardware License, Version 0.51, see LICENSE for details.
# SPDX-License-Identifier: SHL-0.51

# Author: Tim Fischer <fischeti@iis.ee.ethz.ch>

name: slang

on:
pull_request:
push:
branches:
- main
- develop

concurrency:
group: ${{ github.workflow }}-${{ github.ref }}
cancel-in-progress: true

jobs:

#########
# Slang #
#########
slang:
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
DUT: [axi_mesh, nw_mesh]
ROUTE_ALGO: [xy, src, id]
steps:
- uses: actions/checkout@v6

- name: Install bender
uses: pulp-platform/pulp-actions/bender-install@v2.5.0

- name: Install uv
uses: astral-sh/setup-uv@v7

- name: Generate RTL
run: uv run floogen rtl -c floogen/examples/${{ matrix.DUT }}_${{ matrix.ROUTE_ALGO }}.yml -o generated --no-format

- name: Generate bender file list
# TODO: Remove -e fpnew once fpnew_top.sv is fixed upstream.
run: bender script flist-plus -t floo_synth -t ${{ matrix.DUT }} -e fpnew > sources.f

- name: Slang lint
uses: pulp-platform/pulp-actions/slang@v2.5.0
with:
token: ${{ secrets.GITHUB_TOKEN }}
slang-flags: >-
-f sources.f --top floo_${{ matrix.DUT }}_noc
--ignore-unknown-modules
-Wno-finish-num
--suppress-warnings .bender
3 changes: 3 additions & 0 deletions .gitlab-ci.yml
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Expand Up @@ -12,6 +12,9 @@ variables:
UV: /home/fischeti/.local/bin/uv
UV_LINK_MODE: hardlink

default:
interruptible: true

stages:
- init
- build
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2 changes: 0 additions & 2 deletions Bender.yml
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Expand Up @@ -42,8 +42,6 @@ sources:
- hw/floo_route_xymask.sv
- hw/floo_alu.sv
# Level 2
- hw/floo_route_select.sv
- hw/floo_route_comp.sv
- hw/floo_meta_buffer.sv
- hw/floo_reduction_arbiter.sv
- hw/floo_reduction_unit.sv
Expand Down
6 changes: 5 additions & 1 deletion floogen/templates/floo_nw_router.sv.mako
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Expand Up @@ -120,5 +120,9 @@ floo_nw_router #(
.floo_req_o (${router.name}_req_out),
.floo_rsp_i (${router.name}_rsp_in),
.floo_wide_i (${router.name}_wide_in),
.floo_wide_o (${router.name}_wide_out)
.floo_wide_o (${router.name}_wide_out),
.offload_narrow_req_o (),
.offload_narrow_rsp_i ('0),
.offload_wide_req_o (),
.offload_wide_rsp_i ('0)
);
24 changes: 12 additions & 12 deletions hw/floo_axi_chimney.sv
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Expand Up @@ -684,17 +684,17 @@ module floo_axi_chimney
);

spill_register #(
.T ( floo_req_generic_flit_t ),
.Bypass( !ChimneyCfg.CutOup )
.T ( floo_req_chan_t ),
.Bypass( !ChimneyCfg.CutOup )
) i_req_out_cut (
.clk_i,
.rst_ni,
.valid_i ( floo_req_arb_valid ),
.ready_o ( floo_req_arb_ready ),
.data_i ( floo_req_arb_data ),
.valid_o ( floo_req_o.valid ),
.ready_i ( floo_req_i.ready ),
.data_o ( floo_req_o.req )
.data_i ( floo_req_chan_t'(floo_req_arb_data) ),
.valid_o ( floo_req_o.valid ),
.ready_i ( floo_req_i.ready ),
.data_o ( floo_req_o.req )
);

floo_rsp_generic_flit_t floo_rsp_arb_data;
Expand All @@ -715,17 +715,17 @@ module floo_axi_chimney
);

spill_register #(
.T ( floo_rsp_generic_flit_t ),
.Bypass( !ChimneyCfg.CutOup )
.T ( floo_rsp_chan_t ),
.Bypass( !ChimneyCfg.CutOup )
) i_rsp_out_cut (
.clk_i,
.rst_ni,
.valid_i ( floo_rsp_arb_valid ),
.ready_o ( floo_rsp_arb_ready ),
.data_i ( floo_rsp_arb_data ),
.valid_o ( floo_rsp_o.valid ),
.ready_i ( floo_rsp_i.ready ),
.data_o ( floo_rsp_o.rsp )
.data_i ( floo_rsp_chan_t'(floo_rsp_arb_data) ),
.valid_o ( floo_rsp_o.valid ),
.ready_i ( floo_rsp_i.ready ),
.data_o ( floo_rsp_o.rsp )
);

////////////////////
Expand Down
9 changes: 3 additions & 6 deletions hw/floo_meta_buffer.sv
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Expand Up @@ -196,10 +196,8 @@ module floo_meta_buffer #(
assign ar_no_atop_buf_full = !ar_no_atop_buf_not_full;
assign aw_no_atop_buf_full = !aw_no_atop_buf_not_full;

`ASSERT(NoBResponseIdQueue, axi_rsp_i.b_valid -> (b_oup_data_valid && b_oup_gnt),
"Meta data for B response must exist in Id Queue!")
`ASSERT(NoRResponseIdQueue, axi_rsp_i.r_valid -> (r_oup_data_valid && r_oup_gnt),
"Meta data for R response must exist in Id Queue!")
`ASSERT(NoBResponseIdQueue, axi_rsp_i.b_valid -> (b_oup_data_valid && b_oup_gnt))
`ASSERT(NoRResponseIdQueue, axi_rsp_i.r_valid -> (r_oup_data_valid && r_oup_gnt))
end

// Non-atomic AR's
Expand All @@ -213,8 +211,7 @@ module floo_meta_buffer #(

assign is_atop_r_rsp = AtopSupport && axi_rsp_i.r_valid && (axi_rsp_i.r.id < MaxAtomicTxns);
assign is_atop_b_rsp = AtopSupport && axi_rsp_i.b_valid && (axi_rsp_i.b.id < MaxAtomicTxns);
`ASSERT(NoAtopSupportAw, !(!AtopSupport && is_atop_aw),
"Atomics not supported, but atomic request received!")
`ASSERT(NoAtopSupportAw, !(!AtopSupport && is_atop_aw))

assign r_buf_o = (is_atop_r_rsp && AtopSupport)? atop_r_buf[axi_rsp_i.r.id] : no_atop_r_buf;
assign b_buf_o = (is_atop_b_rsp && AtopSupport)? atop_b_buf[axi_rsp_i.b.id] : no_atop_b_buf;
Expand Down
56 changes: 28 additions & 28 deletions hw/floo_nw_chimney.sv
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Expand Up @@ -1176,9 +1176,9 @@
// Reduction --> Multicast the B response to all members
floo_narrow_b.hdr.collective_op = floo_pkg::collect_op_e'('0);
if(en_narrow_collective(CollectOpCfg)) begin: gen_nar_b_coll
if(is_multicast_op(narrow_aw_buf_hdr_out.hdr.collective_op)) begin: gen_nar_red_rsp
if(is_multicast_op(collect_op_e'(narrow_aw_buf_hdr_out.hdr.collective_op))) begin: gen_nar_red_rsp

Check warning on line 1179 in hw/floo_nw_chimney.sv

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GitHub Actions / verible-verilog-lint

[verible-verilog-lint] hw/floo_nw_chimney.sv#L1179 

Line length exceeds max: 100; is: 104 [Style: line-length] [line-length]
Raw output 
message:"Line length exceeds max: 100; is: 104 [Style: line-length] [line-length]"  location:{path:"./hw/floo_nw_chimney.sv"  range:{start:{line:1179  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}
floo_narrow_b.hdr.collective_op = CollectB;
end else if(is_reduction_op(narrow_aw_buf_hdr_out.hdr.collective_op)) begin: gen_nar_mcast
end else if(is_reduction_op(collect_op_e'(narrow_aw_buf_hdr_out.hdr.collective_op))) begin: gen_nar_mcast

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GitHub Actions / verible-verilog-lint

[verible-verilog-lint] hw/floo_nw_chimney.sv#L1181 

Line length exceeds max: 100; is: 111 [Style: line-length] [line-length]
Raw output 
message:"Line length exceeds max: 100; is: 111 [Style: line-length] [line-length]"  location:{path:"./hw/floo_nw_chimney.sv"  range:{start:{line:1181  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}
floo_narrow_b.hdr.collective_op = Multicast;
end
end
Expand Down Expand Up @@ -1267,9 +1267,9 @@
// Reduction --> Multicast the B response to all members
floo_wide_b.hdr.collective_op = Unicast;
if(en_wide_collective(CollectOpCfg)) begin: gen_wide_b_coll
if(is_multicast_op(wide_aw_buf_hdr_out.hdr.collective_op)) begin: gen_wide_red_rsp
if(is_multicast_op(collect_op_e'(wide_aw_buf_hdr_out.hdr.collective_op))) begin: gen_wide_red_rsp

Check warning on line 1270 in hw/floo_nw_chimney.sv

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GitHub Actions / verible-verilog-lint

[verible-verilog-lint] hw/floo_nw_chimney.sv#L1270 

Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
Raw output 
message:"Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]"  location:{path:"./hw/floo_nw_chimney.sv"  range:{start:{line:1270  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}
floo_wide_b.hdr.collective_op = CollectB;
end else if(is_reduction_op(wide_aw_buf_hdr_out.hdr.collective_op)) begin: gen_wide_mcast
end else if(is_reduction_op(collect_op_e'(wide_aw_buf_hdr_out.hdr.collective_op))) begin: gen_wide_mcast

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GitHub Actions / verible-verilog-lint

[verible-verilog-lint] hw/floo_nw_chimney.sv#L1272 

Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
Raw output 
message:"Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]"  location:{path:"./hw/floo_nw_chimney.sv"  range:{start:{line:1272  column:101}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}
floo_wide_b.hdr.collective_op = Multicast;
end
end
Expand Down Expand Up @@ -1375,17 +1375,17 @@
);

spill_register #(
.T ( floo_req_generic_flit_t ),
.Bypass( !ChimneyCfgN.CutOup )
.T ( floo_req_chan_t ),
.Bypass( !ChimneyCfgN.CutOup )
) i_req_out_cut (
.clk_i,
.rst_ni,
.valid_i ( floo_req_arb_valid ),
.ready_o ( floo_req_arb_ready ),
.data_i ( floo_req_arb_data ),
.valid_o ( floo_req_o.valid ),
.ready_i ( floo_req_i.ready ),
.data_o ( floo_req_o.req )
.valid_i ( floo_req_arb_valid ),
.ready_o ( floo_req_arb_ready ),
.data_i ( floo_req_chan_t'(floo_req_arb_data) ),
.valid_o ( floo_req_o.valid ),
.ready_i ( floo_req_i.ready ),
.data_o ( floo_req_o.req )
);

floo_rsp_generic_flit_t floo_rsp_arb_data;
Expand All @@ -1406,17 +1406,17 @@
);

spill_register #(
.T ( floo_rsp_generic_flit_t ),
.Bypass( !ChimneyCfgN.CutOup )
.T ( floo_rsp_chan_t ),
.Bypass( !ChimneyCfgN.CutOup )
) i_rsp_out_cut (
.clk_i,
.rst_ni,
.valid_i ( floo_rsp_arb_valid ),
.ready_o ( floo_rsp_arb_ready ),
.data_i ( floo_rsp_arb_data ),
.valid_o ( floo_rsp_o.valid ),
.ready_i ( floo_rsp_i.ready ),
.data_o ( floo_rsp_o.rsp )
.valid_i ( floo_rsp_arb_valid ),
.ready_o ( floo_rsp_arb_ready ),
.data_i ( floo_rsp_chan_t'(floo_rsp_arb_data) ),
.valid_o ( floo_rsp_o.valid ),
.ready_i ( floo_rsp_i.ready ),
.data_o ( floo_rsp_o.rsp )
);
// Credit is never used for narrow req/rsp
if (VcImpl == floo_pkg::VcCredit) begin : gen_credit_tie
Expand All @@ -1443,17 +1443,17 @@
);

spill_register #(
.T ( floo_wide_generic_flit_t ),
.Bypass( !ChimneyCfgW.CutOup )
.T ( floo_wide_chan_t ),
.Bypass( !ChimneyCfgW.CutOup )
) i_wide_out_cut (
.clk_i,
.rst_ni,
.valid_i ( floo_wide_arb_valid ),
.ready_o ( floo_wide_arb_ready ),
.data_i ( floo_wide_arb_data ),
.valid_o ( floo_wide_req_arb_valid_out ),
.ready_i ( floo_wide_req_arb_gnt_in ),
.data_o ( floo_wide_o.wide )
.valid_i ( floo_wide_arb_valid ),
.ready_o ( floo_wide_arb_ready ),
.data_i ( floo_wide_chan_t'(floo_wide_arb_data) ),
.valid_o ( floo_wide_req_arb_valid_out ),
.ready_i ( floo_wide_req_arb_gnt_in ),
.data_o ( floo_wide_o.wide )
);

// Mux the ready of the read and write channels to the ACK/NACK protocol
Expand Down
2 changes: 1 addition & 1 deletion hw/floo_output_arbiter.sv
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Expand Up @@ -56,7 +56,7 @@ module floo_output_arbiter import floo_pkg::*;
reduce_mask = '0;
if (EnParallelReduction) begin
for (int i = 0; i < NumParallelRedRoutes; i++) begin
reduce_mask[i] = (is_parallel_reduction_op(data_i[i].hdr.collective_op));
reduce_mask[i] = (is_parallel_reduction_op(collect_op_e'(data_i[i].hdr.collective_op)));
end
end
end
Expand Down
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