Make AllocaSinking more aggressive for high register pressure kernels

When private memory is allocated on stack (e.g. -O0), rematerialization does not
handle address arithmetic. This commit makes alloca sinking more aggressive
during PrivateMemoryResolution.

Author: ekochetk

IGC/Compiler/Optimizer/OpenCLPasses/PrivateMemory/PrivateMemoryResolution.cpp

@@ -442,7 +442,7 @@ bool PrivateMemoryResolution::runOnModule(llvm::Module &M) {
 // [6] load j
 // [7] bar(j)
 //
-static void sinkAllocas(SmallVectorImpl<AllocaInst *> &Allocas) {
+static void sinkAllocas(SmallVectorImpl<AllocaInst *> &Allocas, bool highAllocaRAPressure) {
   IGC_ASSERT(false == Allocas.empty());
   DominatorTree DT;
   llvm::LoopInfoBase<llvm::BasicBlock, llvm::Loop> LI;
@@ -499,9 +499,12 @@ static void sinkAllocas(SmallVectorImpl<AllocaInst *> &Allocas) {
     }
 
     // Find the nearest Denominator outside loops to prevent multiple allocations
-    BasicBlock *CurBB = AI->getParent();
-    while (DomBB && DomBB != CurBB && LI.getLoopFor(DomBB) != nullptr) {
-      DomBB = DT.getNode(DomBB)->getIDom()->getBlock();
+    // In case when we have too many allocas that increase RegPressure, skip this optimization
+    if (!highAllocaRAPressure) {
+      BasicBlock *CurBB = AI->getParent();
+      while (DomBB && DomBB != CurBB && LI.getLoopFor(DomBB) != nullptr) {
+        DomBB = DT.getNode(DomBB)->getIDom()->getBlock();
+      }
     }
 
     if (DomBB) {
@@ -861,7 +864,12 @@ bool PrivateMemoryResolution::resolveAllocaInstructions(bool privateOnStack) {
   if (Ctx.m_instrTypes.numAllocaInsts > IGC_GET_FLAG_VALUE(AllocaRAPressureThreshold)) {
     sinkAllocaSingleUse(allocaInsts);
   }
-  sinkAllocas(allocaInsts);
+
+  // if we have privateOnStack, then address rematerialization will not work for allocas, in this case
+  // we need to sink aggressively, even into loops
+  // TODO: combine this and the upper heuristic into one independent from number of allocas, but from RegPressure
+  bool highAllocaRAPressure = allocaInsts.size() > IGC_GET_FLAG_VALUE(AllocaRAPressureThreshold) && privateOnStack;
+  sinkAllocas(allocaInsts, highAllocaRAPressure);
 
   // Each AllocaInst creates a buffer and all buffers are put together
   // sequentially like the following:

IGC/Compiler/tests/PrivateMemoryResolution/aggressive-alloca-sink.ll

@@ -0,0 +1,59 @@
+;=========================== begin_copyright_notice ============================
+;
+; Copyright (C) 2025 Intel Corporation
+;
+; SPDX-License-Identifier: MIT
+;
+;============================ end_copyright_notice =============================
+;
+; REQUIRES: regkeys
+; RUN: igc_opt --opaque-pointers --regkey AllocaRAPressureThreshold=2 --igc-private-mem-resolution -S %s | FileCheck %s
+
+; CHECK: for.cond:
+; CHECK: for.body:
+; CHECK: call{{.*}}llvm.genx.GenISA.StackAlloca
+; CHECK: br label %for.cond
+
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-n8:16:32"
+target triple = "spir64-unknown-unknown"
+
+define spir_kernel void @call_func_in_loop() #0 {
+entry:
+  %out.addr = alloca ptr addrspace(1), align 8
+  %gid = alloca i32, align 4
+  %j = alloca i32, align 4
+  br label %for.cond
+
+for.cond:                                         ; preds = %for.body, %entry
+  br label %for.body
+
+for.body:                                         ; preds = %for.cond
+  %0 = load i32, ptr %j, align 4
+  br label %for.cond
+}
+
+declare spir_func void @add_one()
+
+attributes #0 = { "visaStackCall" }
+
+!igc.functions = !{!0, !4}
+
+!0 = !{ptr @add_one, !1}
+!1 = !{!2, !3}
+!2 = !{!"function_type", i32 2}
+!3 = !{!"implicit_arg_desc"}
+!4 = !{ptr @call_func_in_loop, !5}
+!5 = !{!6, !7}
+!6 = !{!"function_type", i32 0}
+!7 = !{!"implicit_arg_desc", !8, !9, !10, !11, !12, !13, !14, !15, !17}
+!8 = !{i32 0}
+!9 = !{i32 2}
+!10 = !{i32 7}
+!11 = !{i32 8}
+!12 = !{i32 9}
+!13 = !{i32 10}
+!14 = !{i32 13}
+!15 = !{i32 15, !16}
+!16 = !{!"explicit_arg_num", i32 0}
+!17 = !{i32 59, !16}