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Update Ptx constant-proxy rule #531

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Merged
hernanponcedeleon merged 7 commits into from
Oct 22, 2023
Merged

Update Ptx constant-proxy rule #531

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a2297d6
remove scope of weak instructions
tonghaining Oct 8, 2023
0fe9303
remove constant proxy cause
tonghaining Oct 8, 2023
a1c47e3
remove CON tag from visitStoreConstant()
tonghaining Oct 9, 2023
f55be5f
remove unused w-locord
tonghaining Oct 11, 2023
71f7289
Merge branch 'development' into ptx-constant
hernanponcedeleon Oct 22, 2023
f978c91
Remove w-locord from nochains version
hernan-poncedeleon Oct 22, 2023
c29e3bf
Merge branch 'development' into ptx-constant
hernanponcedeleon Oct 22, 2023
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2 changes: 0 additions & 2 deletions cat/ptx-v7.5.cat
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Expand Up @@ -77,8 +77,6 @@ let proxy-preserved-cause-base
| vloc & (cause-base & (proxy-fence-ops^-1); cause-base; [GEN])
| vloc & ([GEN]; cause-base; cause-base & proxy-fence-ops)
| vloc & (cause-base & (proxy-fence-ops^-1); cause-base; cause-base & proxy-fence-ops)
// The alloy model does not support the constant proxy below
| loc & ([M & CON]; cause-base; [F & CON]; cause-base; [M & CON])
| loc & ([GEN]; cause-base; [F & ALIAS]; cause-base; [GEN])
| loc & (cause-base & (proxy-fence-ops^-1); cause-base; [F & ALIAS]; cause-base; [GEN])
| loc & ([GEN]; cause-base; [F & ALIAS]; cause-base; cause-base & proxy-fence-ops)
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2 changes: 0 additions & 2 deletions cat/spirv-nochains.cat
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Expand Up @@ -129,8 +129,6 @@ let locord = loc &
( ([W]; (hb & avvisinc); avdv; (hb); visdv; (hb & avvisinc); [R])) // RaW (via device domain)
)

let w-locord = [W]; locord

(***********************)
(* Memory Model Axioms *)
(***********************)
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2 changes: 0 additions & 2 deletions cat/spirv.cat
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Expand Up @@ -129,8 +129,6 @@ let locord = loc &
( ([W]; (hb & avvisinc); avdv; (hb); visdv; (hb & avvisinc); [R])) // RaW (via device domain)
)

let w-locord = [W]; locord

(***********************)
(* Memory Model Axioms *)
(***********************)
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24 changes: 9 additions & 15 deletions dartagnan/src/main/java/com/dat3m/dartagnan/parsers/program/visitors/VisitorLitmusPTX.java
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Expand Up @@ -142,19 +142,17 @@ public Object visitStoreConstant(LitmusPTXParser.StoreConstantContext ctx) {
MemoryObject object = programBuilder.getOrNewMemoryObject(ctx.location().getText());
IConst constant = (IConst) ctx.constant().accept(this);
String mo = ctx.mo().content;
String scope;
Store store = EventFactory.newStoreWithMo(object, constant, mo);
switch (mo) {
case Tag.PTX.WEAK -> {
if (ctx.scope() != null) {
throw new ParsingException("Weak store instruction doesn't need scope: " + ctx.scope().content);
}
scope = Tag.PTX.SYS;
}
case Tag.PTX.REL, Tag.PTX.RLX -> scope = ctx.scope().content;
case Tag.PTX.REL, Tag.PTX.RLX -> store.addTags(ctx.scope().content);
default -> throw new ParsingException("Store instruction doesn't support mo: " + mo);
}
Store store = EventFactory.newStoreWithMo(object, constant, mo);
store.addTags(scope, ctx.store().storeProxy, Tag.PTX.CON);
store.addTags(ctx.store().storeProxy);
return programBuilder.addChild(mainThread, store);
}

Expand All @@ -163,19 +161,17 @@ public Object visitStoreRegister(LitmusPTXParser.StoreRegisterContext ctx) {
MemoryObject object = programBuilder.getOrNewMemoryObject(ctx.location().getText());
Register register = (Register) ctx.register().accept(this);
String mo = ctx.mo().content;
String scope;
Store store = EventFactory.newStoreWithMo(object, register, mo);
switch (mo) {
case Tag.PTX.WEAK -> {
if (ctx.scope() != null) {
throw new ParsingException("Weak store instruction doesn't need scope: " + ctx.scope().content);
}
scope = Tag.PTX.SYS;
}
case Tag.PTX.REL, Tag.PTX.RLX -> scope = ctx.scope().content;
case Tag.PTX.REL, Tag.PTX.RLX -> store.addTags(ctx.scope().content);
default -> throw new ParsingException("Store instruction doesn't support mo: " + mo);
}
Store store = EventFactory.newStoreWithMo(object, register, mo);
store.addTags(scope, ctx.store().storeProxy);
store.addTags(ctx.store().storeProxy);
return programBuilder.addChild(mainThread, store);
}

Expand Down Expand Up @@ -227,19 +223,17 @@ public Object visitLoadLocation(LitmusPTXParser.LoadLocationContext ctx) {
Register register = (Register) ctx.register().accept(this);
MemoryObject location = programBuilder.getOrNewMemoryObject(ctx.location().getText());
String mo = ctx.mo().content;
String scope;
Load load = EventFactory.newLoadWithMo(register, location, mo);
switch (mo) {
case Tag.PTX.WEAK -> {
if (ctx.scope() != null) {
throw new ParsingException("Weak load instruction doesn't need scope: " + ctx.scope().content);
}
scope = Tag.PTX.SYS;
}
case Tag.PTX.ACQ, Tag.PTX.RLX -> scope = ctx.scope().content;
case Tag.PTX.ACQ, Tag.PTX.RLX -> load.addTags(ctx.scope().content);
default -> throw new ParsingException("Load instruction doesn't support mo: " + mo);
}
Load load = EventFactory.newLoadWithMo(register, location, mo);
load.addTags(scope, ctx.load().loadProxy);
load.addTags(ctx.load().loadProxy);
return programBuilder.addChild(mainThread, load);
}

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2 changes: 1 addition & 1 deletion litmus/PTX/Nvidia/Proxy-Const-ConstFence.litmus
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Expand Up @@ -2,7 +2,7 @@ PTX Proxy-Const-with-ConstFence
"A single thread example showing constant proxy fence usage"
{
rd1 = 0;
rd2 @ generic aliases rd1;
rd2 @ constant aliases rd1;
P0:r0=0;
}
P0@cta 0,gpu 0 ;
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2 changes: 1 addition & 1 deletion litmus/PTX/Nvidia/Proxy-Const-MP-cause1.litmus
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Expand Up @@ -3,7 +3,7 @@ PTX Proxy-Const-MP-cause1
"The constant fence along the base causality path from the weak st to the cold, hence rf is guaranteed"
{
rd1 = 0;
rd2 @ generic aliases rd1;
rd2 @ constant aliases rd1;
rd4 = 0;
P0:r0=0;
}
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2 changes: 1 addition & 1 deletion litmus/PTX/Nvidia/Proxy-Const-MP-cause2.litmus
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Expand Up @@ -3,7 +3,7 @@ PTX Proxy-Const-MP-cause2
"The constant fence along the base causality path from the weak st to the cold, hence rf is guaranteed"
{
rd1 = 0;
rd2 @ generic aliases rd1;
rd2 @ constant aliases rd1;
rd4 = 0;
P1:r3=0;
P1:r5=0;
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2 changes: 1 addition & 1 deletion litmus/PTX/Nvidia/Proxy-SingleThread-rf-surW-surF-conF-conR.litmus
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Expand Up @@ -3,7 +3,7 @@ PTX Proxy-SingleThread-rf-surW-surF-conF-conR
"The generic memory is synchronize with surface cache by surface fence, then constant fence synchronize the data from generic memory to constant cache. Hence the cold is guaranteed to rf sust"
{
rd1 = 0;
rd2 @ generic aliases rd1;
rd2 @ constant aliases rd1;
rd3 @ surface aliases rd1;
P0:r0=0;
}
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