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Aarch64: teach VASM about shift/extend operands #9669

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Aarch64: teach VASM about shift/extend operands #9669

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@igogo-x86 igogo-x86 commented Nov 14, 2025

  • add VregShiftExtend and new shift opcodes so ARM can encode shifted/extended GPR operands directly
  • wire the new operand through printers, visitors, copy-prop, register allocation, and metadata
  • tighten the ARM emitter and simplifier: reuse toOperand(), add folding for ALU/test ops, and guard the lea fold against illegal scales

@igogo-x86
Aarch64: teach VASM about shift/extend operands
d146631 
 - add VregShiftExtend and new *shift* opcodes so ARM can encode shifted/extended GPR operands directly
 - wire the new operand through printers, visitors, copy-prop, register allocation, and metadata
 - tighten the ARM emitter and simplifier: reuse toOperand(), add folding for ALU/test ops, and guard the lea fold against illegal scales
@meta-cla meta-cla bot added the CLA Signed label Nov 14, 2025
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meta-codesync bot commented Nov 14, 2025

@facebook-github-bot has imported this pull request. If you are a Meta employee, you can view this in D87067693. (Because this pull request was imported automatically, there will not be any future comments.)

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