stm32: U5 time-driver-lptim improvements#6536
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U3/u5 uses the same registers as WBA, so expand the LPTIMv2a feature gating to these chips. One difference is that the default clock is Msik, not Pclk1, ensure_lptim_clk!() calls have been adjusted accordingly.
Two RCC register values were missing to allow time-driver-lptimX to wake from STOP on u5/u3: - LPTIM1AMEN: enable LPBAM/timer autonomous mode in Stop0/1/2 - APB3SMEN: keep the APB clock available to route timer interrupts to NVIC in Stop mode
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Hi folks,
I've tried to get time-driver-lptim working on stm32u5, and found a couple of small changes were needed. Effectively, this PR just expands #5963 to the equivalently-operating u3/u5 chips.
I'm reasonably new to the innards of embassy, so please advise if there are smarter ways to handle this. Also note, I've only tested this on u575, but during a review of my patch, AI suggested that this should also apply to u3, so I've included U3 too. The stm32-data table supports this, but I have no u3 to test on.
Best,
K