mcxa: enable DMA0 channels 8-11 on MCXA5xx#6524
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The MCXA5xx (e.g. MCXA577) exposes 12 DMA0 channels (0-11), but the embassy-mcxa driver only implemented channels 0-7, a leftover from the MCXA2xx (8-channel) port. Add channels 8-11, gated behind mcxa5xx. - Bump nxp-pac to pick up the EDMA_0_TCD Tcd12 fix (embassy-rs/nxp-pac#112), so the TCD array actually has 12 slots; without it, channels 8-11 would index past the 8-slot array at runtime. - Add impl_channel! and impl_dma_interrupt_handler! for DMA0_CH8-11 (mcxa5xx only). NVIC wiring is derived dynamically from the channel's interrupt, so no further plumbing is needed. - Replace the hardcoded [_; 8] STATES/CALLBACKS array sizes with a DMA0_CHANNELS const (12 on mcxa5xx, 8 otherwise). The nxp-pac bump also pulls in the FlexCAN clock-gate metadata, which embassy-mcxa did not yet handle. Add a minimal CanConfig gate-config placeholder (mirroring DacConfig) and map the CANn peripheral name to its lexcann MRCC register field so the auto-generated clock gates compile. There is no CAN HAL driver yet; this only keeps the build green. DMA1 (CH0-3) remains unimplemented and is left for a future change. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Copilot-Session: 17a8f05c-8e8f-4aa7-afe0-ff4d68685fd6
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This is more elegantly fixed in #6525 (includes DMA1 support.) I'll leave this here just in case, but if that PR merges, this one is obsolete. |
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Summary
The MCXA5xx (e.g. MCXA577) exposes 12 DMA0 channels (0-11), but the
embassy-mcxadriver only implemented channels 0-7 — a leftover from the 8-channel MCXA2xx port. This PR enables DMA0 channels 8-11 on MCXA5xx.Changes
nxp-pacto pick up theEDMA_0_TCDTcd12fix (mcxa5xx: expose all 12 DMA0 TCD channels (EDMA_0_TCD Tcd8 -> Tcd12) nxp-pac#112), so the TCD register array actually has 12 slots. Without it, channels 8-11 would index past the 8-slot array at runtime.impl_channel!andimpl_dma_interrupt_handler!forDMA0_CH8-DMA0_CH11(mcxa5xxonly). NVIC wiring is derived dynamically from each channel's interrupt, so no additional plumbing is needed.[_; 8]STATES/CALLBACKSarray sizes with aDMA0_CHANNELSconst (12 onmcxa5xx, 8 otherwise).Incidental: FlexCAN clock-gate build fix
The
nxp-pacbump also pulls in FlexCAN clock-gate metadata thatembassy-mcxadid not yet handle (unrelated to DMA, but required for the crate to compile against currentnxp-pacmain). Minimal fix:CanConfiggate-config placeholder mirroring the existingDacConfig.CANnperipheral name to itsflexcannMRCC register field in the gate codegen.There is no CAN HAL driver yet; this only keeps the build green.
Not included
DMA1 (CH0-3) remains unimplemented and is intentionally left for a follow-up, as it requires decoupling the flat channel index from the per-controller TCD/state indexing.
Testing
Builds clean for both
--features mcxa5xxand--features mcxa2xxonthumbv8m.main-none-eabihf.