arm64: dts: rockchip: mixtile-edge2: fix Bluetooth wake GPIOs and enable eMMC HS400ES - #544
arm64: dts: rockchip: mixtile-edge2: fix Bluetooth wake GPIOs and enable eMMC HS400ES#544evtest-hash wants to merge 2 commits into
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BT,wake_gpio and BT,wake_host_irq are interchanged. On the Core-3568 module GPIO3_A1 is BT_WAKE_HOST_H, an input to the SoC driven by the AP6275S, and GPIO3_A2 is HOST_WAKE_BT_H, an output towards the module. rfkill-bt drives wake_gpio as an output and requests an edge interrupt on wake_host_irq, so as configured the interrupt sat on the outgoing line while the output drove the incoming one. Swap them, reference the bt_enable/bt_host_wake/bt_wake pinctrl groups that were defined but never applied, and drop the internal pull-down on bt_host_wake, which worked against the board's external pull-up. Signed-off-by: Kevin Zhuang <kevin.zhuang@focalcrest.com>
eMMC_DATA_STROBE is routed to the SoC and the fitted device reports EXT_CSD DEVICE_TYPE 0x57 and STROBE_SUPPORT 0x01, so HS400 with enhanced strobe is available. Unlike HS200, which the sdhci core derives from CAPS1, sdhci_dwcmshc_rk35xx_pdata does not set SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400, so MMC_CAP2_HS400 can only come from the device tree. Sequential read on the eMMC, fio with O_DIRECT, 1M blocks at qd8: before: timing spec 9 (mmc HS200) 168 MiB/s after: timing spec 10 (mmc HS400 enhanced strobe) 270 MiB/s Signed-off-by: Kevin Zhuang <kevin.zhuang@focalcrest.com>
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rpardini
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NIce, thanks. I've sent a fix Claude found when I was testing rkr7.2, could you please check it as well?
Also, do we have any schematics available for the edge2? I couldn't find it anywhere...
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Two device tree defects on the Mixtile Edge 2.
I work at Focalcrest/Mixtile and have the EDGE2 V1.2.1 and
Mixtile-Core-3568 V1.2.1 schematics; both changes come off those.
Verified on an Edge 2 running 6.1.115 built from this branch with
./compile.sh kernel BOARD=mixtile-edge2 BRANCH=vendoronarmbian/build v25.11, A/B'd by swapping only the DTB on the same kernel:
module actually drives it. The three bt_* pinctrl groups also get
applied for the first time.
read-only on /dev/mmcblk0: sequential 1M qd8 168 -> 270 MiB/s;
random 4k qd32 6502 -> 6978 IOPS, i.e. unchanged as expected.
Scope: this PR is only these two. Further fixes for this board (PCIe
supply naming, USB hub reset and M.2 card power modelling, Type-C USB
2.0 capping, unused-node removal) will follow separately, and I'll
mirror this set to rk-6.1-rkr7.2 once it lands here.