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aayush062026/README.md

Aayush Ranjan

Protocol IP & RTL Design Engineer | TSN · OTN · MIPI · PCIe · White Rabbit

Senior R&D Engineer with 5+ years designing protocol IP and RTL for EDA and test-and-measurement tooling. Hands-on across the full protocol stack: frame/packet processing, FEC/CRC/ECC, and clock synchronization, in SystemVerilog and Verilog. Currently focused on Time-Sensitive Networking (802.1CB FRER, 802.1Qci PSFP) and White Rabbit sub-nanosecond synchronization.

Available for freelance RTL design, protocol verification, and micro-architecture consulting.

Skills

Protocols: TSN (802.1CB FRER, 802.1Qci PSFP, 802.1AS/gPTP), White Rabbit, OTN (OTU4/OTUCn, Flexo, FOIC, FEC), MIPI (CSI-2, DSI, C-PHY, D-PHY), PCIe (Transaction Layer - TLP/DLLP, ECRC/LCRC), TCP/IP, AMBA AXI

Languages / HDL: SystemVerilog, Verilog, VHDL

Tools: QuestaSim, Vivado, Git, Linux, MATLAB

Featured Repositories

Repository Description
mipi-csi2-dsi-ip MIPI CSI-2 / DSI protocol engine reference design
otn-flexo-fec OTN frame sync, skew compensation, FEC reference IP
pcie-transaction-layer PCIe TLP arbiter, ECRC/LCRC reference implementation
tcp-ip-stack TCP/IP stack fundamentals and packet processing reference
tsn-frer-psfp IEEE 802.1CB FRER + 802.1Qci PSFP reference implementation
white-rabbit-sync White Rabbit sub-nanosecond clock sync reference design

Each repository contains an original architecture write-up, block diagrams, and basic functional RTL built specifically for this portfolio.

Contact

LinkedIn: linkedin.com/in/aayushranjan007. Email: aayushranjan98@gmail.com

Pinned Loading

  1. mipi-csi2-dsi-ip mipi-csi2-dsi-ip Public

    MIPI CSI-2 / DSI protocol engine - architecture, block diagrams, reference RTL.

  2. otn-flexo-fec otn-flexo-fec Public

    OTN OTU4/OTUCn and Flexo protocol modules: frame sync, skew compensation, FEC reference RTL.

  3. pcie-transaction-layer pcie-transaction-layer Public

    PCIe Transaction Layer: TLP arbiter, ECRC/LCRC reference RTL over AMBA AXI.

  4. tcp-ip-stack tcp-ip-stack Public

    TCP/IP stack fundamentals and packet processing reference design.

  5. tsn-frer-psfp tsn-frer-psfp Public

    IEEE 802.1CB FRER and 802.1Qci PSFP reference RTL for deterministic Ethernet (TSN).

  6. white-rabbit-sync white-rabbit-sync Public

    White Rabbit sub-nanosecond clock synchronization reference design (PTP/gPTP based).