Fix full adder signal validity and D latch placement

[rollrat]

Summary

• Restore local placer routing guards used by the full adder path and reject switch/cobble short cases that produced invalid physical candidates.
• Fix hard-powered cobble extraction and simulator settled-state normalization so world-to-logic and interactive simulation agree better with the placed circuit.
• Improve D latch RS-core attachment search, then clarify the D latch input-gating prefix structure for the next inner_graph-based refactor.

Tests

• cargo test --release test_generate_component_full_adder -- --nocapture
• cargo test --release test_generate_component_d_latch -- --nocapture