EDK2: Add CONFIG_EDK2_RTKUNDI_DRIVER for RTL8168 PXE (Acer CXI4 / Kaisa)

configs/cml/config.kaisa.uefi

@@ -1,3 +1,6 @@
+# Chromebox (Kaisa): minipc, no battery, no tablet/lid
+CONFIG_SYSTEM_TYPE_MINIPC=y
+
 CONFIG_VENDOR_GOOGLE=y
 CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/google/puff/puff/flashdescriptor.bin"
 CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/google/puff/puff/me.bin"
@@ -8,3 +11,22 @@ CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE="3rdparty/blobs/mainboard/google/puff/pu
 CONFIG_HAVE_ME_BIN=y
 CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y
 CONFIG_NO_GFX_INIT=y
+
+# Chromebox: no built-in battery, disable long battery string read
+# CONFIG_EC_GOOGLE_CHROMEEC_READ_BATTERY_LONG_STRING is not set
+
+# Hide AC adapter, battery, Chromebook keyboard/vbtn ACPI devices (no such hardware on minipc)
+CONFIG_EC_FOR_CHROMEBOX=y
+
+# Only one TF/SD slot: hide eMMC so Windows shows one SD host controller
+CONFIG_SOC_INTEL_HIDE_EMMC=y
+
+# EDK2 built-in PXE (SNP/NetworkPkg), standard PXE not iPXE
+CONFIG_EDK2_NETWORK_PXE_SUPPORT=y
+CONFIG_EDK2_RTKUNDI_DRIVER=y
+CONFIG_EDK2_ENABLE_IPXE=y
+
+# EDK2: use this fork for local/upstream work (cloned to payloads/external/edk2/workspace/edk2 at build)
+CONFIG_EDK2_REPOSITORY="https://github.com/jackadam1981/mrchromebox_edk2.git"
+# RTL8168 PXE fix branch (Acer CXI4)
+CONFIG_EDK2_TAG_OR_REV="origin/fix/pxe-rtl8168-acer-cxi4"

payloads/external/Makefile.mk

@@ -214,7 +214,9 @@ $(obj)/UEFIPAYLOAD.fd: $(DOTCONFIG) $(IPXE_EFI)
 		OBJCOPY_arm64=$(OBJCOPY_arm64) \
 		MFLAGS= MAKEFLAGS= \
 		CONFIG_EDK2_IPXE=$(CONFIG_EDK2_ENABLE_IPXE) \
-		CONFIG_EDK2_IPXE_OPTION_NAME=$(CONFIG_EDK2_IPXE_OPTION_NAME)
+		CONFIG_EDK2_IPXE_OPTION_NAME=$(CONFIG_EDK2_IPXE_OPTION_NAME) \
+		CONFIG_EDK2_NETWORK_PXE_SUPPORT=$(CONFIG_EDK2_NETWORK_PXE_SUPPORT) \
+		CONFIG_EDK2_RTKUNDI_DRIVER=$(CONFIG_EDK2_RTKUNDI_DRIVER)
 
 $(obj)/ShimmedUniversalPayload.elf: $(DOTCONFIG)
 	$(MAKE) -C payloads/external/edk2 UniversalPayload \
@@ -256,6 +258,7 @@ $(obj)/ShimmedUniversalPayload.elf: $(DOTCONFIG)
 		OBJCOPY_arm=$(OBJCOPY_arm) \
 		OBJCOPY_arm64=$(OBJCOPY_arm64) \
 		MFLAGS= MAKEFLAGS=
+		CONFIG_EDK2_NETWORK_PXE_SUPPORT=$(CONFIG_EDK2_NETWORK_PXE_SUPPORT)
 
 # FILO
 

payloads/external/edk2/Kconfig

@@ -175,13 +175,15 @@ config EDK2_BOOTSPLASH_FILE
 
 config EDK2_BOOT_MANAGER_ESCAPE
 	bool "Use Escape key for Boot Manager"
+	default y if EDK2_NETWORK_PXE_SUPPORT
 	default n
 	help
 	  Use Escape as the hot-key to access the Boot Manager. This replaces
 	  the default key of F2.
 
 config EDK2_BOOT_TIMEOUT
 	int "Set the timeout for boot menu prompt"
+	default 10 if EDK2_NETWORK_PXE_SUPPORT
 	default 2
 	help
 	  The length of time in seconds for which the boot splash/menu prompt will be displayed.
@@ -243,6 +245,7 @@ config EDK2_PRIORITIZE_INTERNAL
 config EDK2_LOAD_OPTION_ROMS
 	bool "Load and Execute OpROMs on PCIe devices"
 	depends on !EDK2_REPO_OFFICIAL
+	default y if EDK2_NETWORK_PXE_SUPPORT
 	default n
 	help
 	  Load and execute OpROMs on PCIe devices.
@@ -309,6 +312,7 @@ config EDK2_USE_LAPIC_TIMER
 
 config EDK2_CUSTOM_BUILD_PARAMS
 	string "edk2 additional custom build parameters"
+	default "-D NETWORK_DRIVER_ENABLE=TRUE -D NETWORK_ENABLE=TRUE -D NETWORK_IP4_ENABLE=TRUE -D NETWORK_IP6_ENABLE=FALSE -D NETWORK_PXE_BOOT_ENABLE=TRUE -D NETWORK_HTTP_BOOT_ENABLE=FALSE -D NETWORK_SNP_ENABLE=TRUE -D NETWORK_TLS_ENABLE=FALSE -D NETWORK_ISCSI_ENABLE=FALSE" if EDK2_NETWORK_PXE_SUPPORT
 	default ""
 	help
 	  edk2 has build options that are not modified by coreboot, and these can be
@@ -317,6 +321,27 @@ config EDK2_CUSTOM_BUILD_PARAMS
 
 	  This option can support both macros `-D` and Pcds `--pcd`.
 
+config EDK2_NETWORK_PXE_SUPPORT
+	bool "Enable EDK2 built-in PXE network boot support"
+	depends on !EDK2_REPO_OFFICIAL
+	default n
+	help
+	  Enable EDK2's built-in PXE network boot support. This uses EDK2's native
+	  Simple Network Protocol (SNP) implementation for network booting.
+
+	  When enabled, EDK2_LOAD_OPTION_ROMS, EDK2_BOOT_TIMEOUT, EDK2_BOOT_MANAGER_ESCAPE
+	  and EDK2_CUSTOM_BUILD_PARAMS (network params) are auto-configured.
+
+config EDK2_RTKUNDI_DRIVER
+	bool "Include Realtek UNDI driver (RtkUndiDxe) for RTL8168 PXE"
+	depends on EDK2_NETWORK_PXE_SUPPORT
+	default y
+	help
+	  When enabled, pass -D RTKUNDI_ENABLE=TRUE to EDK2 so that
+	  UefiPayloadPkg.fdf includes RtkUndiDxe.efi for RTL8168/8111 PXE (e.g. Acer CXI4).
+	  Requires EDK2 fork with RtkUndiDxe.efi in UefiPayloadPkg/NetworkDrivers/
+	  and FDF block wrapped in !if $(RTKUNDI_ENABLE) == TRUE.
+
 config EDK2_ENABLE_IPXE
 	bool "Include iPXE in edk2 payload"
 	depends on !EDK2_REPO_OFFICIAL

payloads/external/edk2/Makefile

@@ -195,6 +195,10 @@ ifneq ($(CONFIG_EDK2_CUSTOM_BUILD_PARAMS),)
 BUILD_STR += $(CONFIG_EDK2_CUSTOM_BUILD_PARAMS)
 endif
 
+ifeq ($(CONFIG_EDK2_RTKUNDI_DRIVER),y)
+BUILD_STR += -D RTKUNDI_ENABLE=TRUE
+endif
+
 all: UefiPayloadPkg
 
 $(WORKSPACE):

src/drivers/net/r8168.c

@@ -256,6 +256,7 @@ static void program_mac_address(struct device *dev, u16 io_base)
 			outl(0x8000f0f4, io_base + ERIAR);
 			break;
 		case 9:
+		case 21:
 			outl(maclo, io_base + ERIDR);
 			inl(io_base + ERIDR);
 			outl(0x8000f0e0, io_base + ERIAR);

src/ec/google/chromeec/Kconfig

@@ -235,6 +235,20 @@ config EC_GOOGLE_CHROMEEC_READ_BATTERY_LONG_STRING
 
 	  If unsure, say N.
 
+config EC_FOR_CHROMEBOX
+	depends on SYSTEM_TYPE_MINIPC
+	bool "Hide AC adapter, battery, Chromebook EC Bus and keyboard/vbtn ACPI devices on mini PC"
+	default y
+	help
+	  On mini PC / Chromebox (no built-in battery, no laptop keyboard), hide
+	  these ACPI devices so they do not appear in the OS device manager:
+	  - Microsoft AC Adapter (ACPI0003)
+	  - Microsoft ACPI Compatible Control Method Battery (PNP0C0A)
+	  - Chromebook EC Bus (GOOG0004 / CREC)
+	  - Chromebook Keyboard Settings & Buttons (GOOG000A / INT33D6 vbtn)
+
+	  Say Y to hide them when SYSTEM_TYPE_MINIPC is set.
+
 config EC_GOOGLE_CHROMEEC_LPC_GENERIC_MEMORY_RANGE
 	def_bool n
 	help

src/ec/google/chromeec/acpi/ac.asl

@@ -14,6 +14,10 @@ Device (AC)
 
 	Method (_STA)
 	{
+#if CONFIG(EC_FOR_CHROMEBOX)
+		Return (0)
+#else
 		Return (0x0F)
+#endif
 	}
 }

src/ec/google/chromeec/acpi/battery.asl

@@ -431,7 +431,11 @@ Device (BAT0)
 
 	Method (_STA, 0, Serialized)
 	{
+#if CONFIG(EC_FOR_CHROMEBOX)
+		Return (0)
+#else
 		Return (BSTA (0))
+#endif
 	}
 
 	Method (_BIF, 0, Serialized)
@@ -521,7 +525,11 @@ Device (BAT1)
 
 	Method (_STA, 0, Serialized)
 	{
+#if CONFIG(EC_FOR_CHROMEBOX)
+		Return (0)
+#else
 		Return (BSTA (1))
+#endif
 	}
 
 	Method (_BIF, 0, Serialized)

src/ec/google/chromeec/acpi/cros_ec.asl

@@ -45,7 +45,11 @@ Device (CREC)
 
 	Method(_STA, 0)
 	{
+#if CONFIG(EC_FOR_CHROMEBOX)
+		Return (0)
+#else
 		Return (0xF)
+#endif
 	}
 
 #if CONFIG(DRIVERS_ACPI_THERMAL_ZONE)

src/ec/google/chromeec/acpi/superio.asl

@@ -95,7 +95,11 @@ Scope (\_SB.PCI0)
 		Name (_CID, Package() { EISAID("PNP0303"), EISAID("PNP030B") } )
 
 		Method (_STA, 0, NotSerialized) {
+#if CONFIG(EC_FOR_CHROMEBOX)
+			Return (0)
+#else
 			Return (0x0F)
+#endif
 		}
 
 		Name (_CRS, ResourceTemplate()

src/ec/google/chromeec/acpi/vbtn.asl

@@ -23,7 +23,11 @@ Device (VBTN)
 	}
 	Method(_STA, 0)
 	{
+#if CONFIG(EC_FOR_CHROMEBOX)
+		Return (0)
+#else
 		Return (0xF)
+#endif
 	}
 }
 
@@ -33,6 +37,10 @@ Device (VBTO)
 	Name (_CID, "PNP0C60")
 	Method (_STA, 0)
 	{
+#if CONFIG(EC_FOR_CHROMEBOX)
+		Return (0)
+#else
 		Return (0xF)
+#endif
 	}
 }

src/mainboard/google/puff/Kconfig

@@ -32,6 +32,7 @@ config BOARD_GOOGLE_BASEBOARD_PUFF
 	select RT8168_GEN_ACPI_POWER_RESOURCE
 	select RT8168_GET_MAC_FROM_VPD
 	select RT8168_SET_LED_MODE
+	select RT8168_PUT_MAC_TO_ERI
 	select SOC_INTEL_COMETLAKE_1
 	select SOC_INTEL_CSE_LITE_SKU
 	select SPD_CACHE_IN_FMAP

src/soc/intel/cannonlake/Kconfig

@@ -301,6 +301,17 @@ config MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE
 	  This will enable a workaround in ASL _PS3 and _PS0 methods to force
 	  SD_PWR_ENABLE to stay low in D3.
 
+config SOC_INTEL_HIDE_EMMC
+	depends on SYSTEM_TYPE_MINIPC
+	bool "Hide eMMC controller from OS (show only SD/TF slot as SD host)"
+	default n
+	help
+	  On mini PC / Chromebox with only one physical SD/TF card slot, the PCH
+	  still exposes both eMMC and SDXC in ACPI; Windows shows two "SD host
+	  controller" devices. Select this to hide the eMMC device (_STA = 0) so
+	  only the real SD/TF slot (SDXC) appears. eMMC will not be usable as
+	  storage in the OS when enabled.
+
 config FSP_HEADER_PATH
 	default "3rdparty/fsp/CoffeeLakeFspBinPkg/Include/" if SOC_INTEL_COFFEELAKE || SOC_INTEL_WHISKEYLAKE
 	default "3rdparty/fsp/CometLakeFspBinPkg/CometLake1/Include/" if SOC_INTEL_COMETLAKE_1

src/soc/intel/cannonlake/acpi/scs.asl

@@ -21,6 +21,13 @@ Scope (\_SB.PCI0) {
 		Name (TEMP, 0)
 		Name (DSUU, ToUUID("f6c13ea5-65cd-461f-ab7a-29f7e8d5bd61"))
 
+#if CONFIG(SOC_INTEL_HIDE_EMMC)
+		Method (_STA, 0, NotSerialized)
+		{
+			Return (0)
+		}
+#endif
+
 		OperationRegion(SCSR, PCI_Config, 0x00, 0x100)
 		Field(SCSR, WordAcc, NoLock, Preserve) {
 			VDID, 32,	/* PCI VID DID */

src/soc/intel/cannonlake/fsp_params.c

@@ -602,7 +602,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 	};
 
 	/* eMMC and SD */
-	s_cfg->ScsEmmcEnabled = is_devfn_enabled(PCH_DEVFN_EMMC);
+	s_cfg->ScsEmmcEnabled = CONFIG(SOC_INTEL_HIDE_EMMC) ? 0 : is_devfn_enabled(PCH_DEVFN_EMMC);
 	if (s_cfg->ScsEmmcEnabled) {
 		s_cfg->ScsEmmcHs400Enabled = config->ScsEmmcHs400Enabled;
 		s_cfg->PchScsEmmcHs400DllDataValid = config->EmmcHs400DllNeed;