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System library updates for mikroSDK-2.19.0 release #607

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Merged
StrahinjaJacimovic merged 24 commits into from
Jul 7, 2026
Merged

System library updates for mikroSDK-2.19.0 release #607

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92754b5
Added PCKE to clock files for dual core Renesas MCUs
IvanRuzavin Jul 1, 2026
735caaf
Added ADCCLK and GPTCLK handling for dual-core Renesas MCUs
IvanRuzavin Jul 1, 2026
020c3b5
Added PLL2, ADCCLK and GPTCLK where it is needed for all Renesas MCUs…
IvanRuzavin Jul 1, 2026
81b3802
Added Division to I3C clock for MCUs which have it
IvanRuzavin Jul 1, 2026
0eacdc0
Fixed I3C waiting approach
IvanRuzavin Jul 1, 2026
efebf15
Added ADCCLK and GPTCLK into sys libs for MCU families that have it
IvanRuzavin Jul 1, 2026
6b09ebf
Adjusted IICCK clock settings for RA6T2 MCUs
IvanRuzavin Jul 1, 2026
7deda7b
Adjusted GPTCLK clock settings for RA6T2 MCUs
IvanRuzavin Jul 1, 2026
c873b3e
Removed ADCCLK and GPTCLK from RA8M1 and RA8T1 system libraries
IvanRuzavin Jul 1, 2026
b77ff41
Added GPTCLK and IICLK calculations for RA6T2
IvanRuzavin Jul 1, 2026
b8de634
Fixed comments for PLL clocks
IvanRuzavin Jul 1, 2026
1653057
Added PLL2 settings for RA6T2 MCUs
IvanRuzavin Jul 1, 2026
a308e8c
Fixed FLWT for RA6T2
IvanRuzavin Jul 1, 2026
8e6e8ee
Added PCLKE clock for dual-core MCUs
IvanRuzavin Jul 1, 2026
6bdc560
Added GPTCLK calculations for RA8D2 MCUs
IvanRuzavin Jul 1, 2026
56529d0
Added GPTCLK calculations to all dual-core MCU families
IvanRuzavin Jul 1, 2026
eb0e105
Fixed bit naming for Renesas system libraries
IvanRuzavin Jul 1, 2026
4aeefaf
Updated the clock switching for ADC, I3C and GPT
IvanRuzavin Jul 1, 2026
55170ef
Removed GPTCLK as it is not applicable to SDK implementation
IvanRuzavin Jul 2, 2026
dfd7249
Returned HCOWTCR for RA6M5 families
IvanRuzavin Jul 2, 2026
60df803
Added M85 delay instruction to prevent delay from optimization
IvanRuzavin Jul 2, 2026
cda8570
Reverted M85 delay instruction to prevent delay from optimization
IvanRuzavin Jul 2, 2026
5e86334
Removed unnecessary instruction for M85 delay
IvanRuzavin Jul 2, 2026
7caf019
Reverted RA6T2 mcu header
IvanRuzavin Jul 2, 2026
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30 changes: 0 additions & 30 deletions ARM/gcc_clang/def/R7FA4L1BB3CAG.json
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -451,36 +451,6 @@
"unused": "000000fe",
"label": "Pll control register"
},
{
"address": "4001e031",
"default": "0",
"fields": [
{
"hidden": false,
"init": "0",
"key": "MEMWAIT",
"label": "Memory Wait Cycle Select for Code Flash",
"mask": "3",
"settings": [
{
"label": "No wait",
"value": "0"
},
{
"label": "One wait",
"value": "1"
},
{
"label": "Two waits",
"value": "2"
}
]
}
],
"key": "SYSTEM_MEMWAIT",
"unused": "000000fc",
"label": "Memory wait cycle control register for code flash"
},
{
"address": "4001e032",
"default": "1",
Expand Down
30 changes: 0 additions & 30 deletions ARM/gcc_clang/def/R7FA4L1BB3CAH.json
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -451,36 +451,6 @@
"unused": "000000fe",
"label": "Pll control register"
},
{
"address": "4001e031",
"default": "0",
"fields": [
{
"hidden": false,
"init": "0",
"key": "MEMWAIT",
"label": "Memory Wait Cycle Select for Code Flash",
"mask": "3",
"settings": [
{
"label": "No wait",
"value": "0"
},
{
"label": "One wait",
"value": "1"
},
{
"label": "Two waits",
"value": "2"
}
]
}
],
"key": "SYSTEM_MEMWAIT",
"unused": "000000fc",
"label": "Memory wait cycle control register for code flash"
},
{
"address": "4001e032",
"default": "1",
Expand Down
30 changes: 0 additions & 30 deletions ARM/gcc_clang/def/R7FA4L1BB4CFL.json
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -451,36 +451,6 @@
"unused": "000000fe",
"label": "Pll control register"
},
{
"address": "4001e031",
"default": "0",
"fields": [
{
"hidden": false,
"init": "0",
"key": "MEMWAIT",
"label": "Memory Wait Cycle Select for Code Flash",
"mask": "3",
"settings": [
{
"label": "No wait",
"value": "0"
},
{
"label": "One wait",
"value": "1"
},
{
"label": "Two waits",
"value": "2"
}
]
}
],
"key": "SYSTEM_MEMWAIT",
"unused": "000000fc",
"label": "Memory wait cycle control register for code flash"
},
{
"address": "4001e032",
"default": "1",
Expand Down
30 changes: 0 additions & 30 deletions ARM/gcc_clang/def/R7FA4L1BB4CFM.json
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -451,36 +451,6 @@
"unused": "000000fe",
"label": "Pll control register"
},
{
"address": "4001e031",
"default": "0",
"fields": [
{
"hidden": false,
"init": "0",
"key": "MEMWAIT",
"label": "Memory Wait Cycle Select for Code Flash",
"mask": "3",
"settings": [
{
"label": "No wait",
"value": "0"
},
{
"label": "One wait",
"value": "1"
},
{
"label": "Two waits",
"value": "2"
}
]
}
],
"key": "SYSTEM_MEMWAIT",
"unused": "000000fc",
"label": "Memory wait cycle control register for code flash"
},
{
"address": "4001e032",
"default": "1",
Expand Down
30 changes: 0 additions & 30 deletions ARM/gcc_clang/def/R7FA4L1BB4CFP.json
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -451,36 +451,6 @@
"unused": "000000fe",
"label": "Pll control register"
},
{
"address": "4001e031",
"default": "0",
"fields": [
{
"hidden": false,
"init": "0",
"key": "MEMWAIT",
"label": "Memory Wait Cycle Select for Code Flash",
"mask": "3",
"settings": [
{
"label": "No wait",
"value": "0"
},
{
"label": "One wait",
"value": "1"
},
{
"label": "Two waits",
"value": "2"
}
]
}
],
"key": "SYSTEM_MEMWAIT",
"unused": "000000fc",
"label": "Memory wait cycle control register for code flash"
},
{
"address": "4001e032",
"default": "1",
Expand Down
30 changes: 0 additions & 30 deletions ARM/gcc_clang/def/R7FA4L1BB4CNE.json
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -451,36 +451,6 @@
"unused": "000000fe",
"label": "Pll control register"
},
{
"address": "4001e031",
"default": "0",
"fields": [
{
"hidden": false,
"init": "0",
"key": "MEMWAIT",
"label": "Memory Wait Cycle Select for Code Flash",
"mask": "3",
"settings": [
{
"label": "No wait",
"value": "0"
},
{
"label": "One wait",
"value": "1"
},
{
"label": "Two waits",
"value": "2"
}
]
}
],
"key": "SYSTEM_MEMWAIT",
"unused": "000000fc",
"label": "Memory wait cycle control register for code flash"
},
{
"address": "4001e032",
"default": "1",
Expand Down
30 changes: 0 additions & 30 deletions ARM/gcc_clang/def/R7FA4L1BD3CAG.json
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -451,36 +451,6 @@
"unused": "000000fe",
"label": "Pll control register"
},
{
"address": "4001e031",
"default": "0",
"fields": [
{
"hidden": false,
"init": "0",
"key": "MEMWAIT",
"label": "Memory Wait Cycle Select for Code Flash",
"mask": "3",
"settings": [
{
"label": "No wait",
"value": "0"
},
{
"label": "One wait",
"value": "1"
},
{
"label": "Two waits",
"value": "2"
}
]
}
],
"key": "SYSTEM_MEMWAIT",
"unused": "000000fc",
"label": "Memory wait cycle control register for code flash"
},
{
"address": "4001e032",
"default": "1",
Expand Down
30 changes: 0 additions & 30 deletions ARM/gcc_clang/def/R7FA4L1BD3CAH.json
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -451,36 +451,6 @@
"unused": "000000fe",
"label": "Pll control register"
},
{
"address": "4001e031",
"default": "0",
"fields": [
{
"hidden": false,
"init": "0",
"key": "MEMWAIT",
"label": "Memory Wait Cycle Select for Code Flash",
"mask": "3",
"settings": [
{
"label": "No wait",
"value": "0"
},
{
"label": "One wait",
"value": "1"
},
{
"label": "Two waits",
"value": "2"
}
]
}
],
"key": "SYSTEM_MEMWAIT",
"unused": "000000fc",
"label": "Memory wait cycle control register for code flash"
},
{
"address": "4001e032",
"default": "1",
Expand Down
30 changes: 0 additions & 30 deletions ARM/gcc_clang/def/R7FA4L1BD4CFL.json
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -451,36 +451,6 @@
"unused": "000000fe",
"label": "Pll control register"
},
{
"address": "4001e031",
"default": "0",
"fields": [
{
"hidden": false,
"init": "0",
"key": "MEMWAIT",
"label": "Memory Wait Cycle Select for Code Flash",
"mask": "3",
"settings": [
{
"label": "No wait",
"value": "0"
},
{
"label": "One wait",
"value": "1"
},
{
"label": "Two waits",
"value": "2"
}
]
}
],
"key": "SYSTEM_MEMWAIT",
"unused": "000000fc",
"label": "Memory wait cycle control register for code flash"
},
{
"address": "4001e032",
"default": "1",
Expand Down
30 changes: 0 additions & 30 deletions ARM/gcc_clang/def/R7FA4L1BD4CFM.json
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -451,36 +451,6 @@
"unused": "000000fe",
"label": "Pll control register"
},
{
"address": "4001e031",
"default": "0",
"fields": [
{
"hidden": false,
"init": "0",
"key": "MEMWAIT",
"label": "Memory Wait Cycle Select for Code Flash",
"mask": "3",
"settings": [
{
"label": "No wait",
"value": "0"
},
{
"label": "One wait",
"value": "1"
},
{
"label": "Two waits",
"value": "2"
}
]
}
],
"key": "SYSTEM_MEMWAIT",
"unused": "000000fc",
"label": "Memory wait cycle control register for code flash"
},
{
"address": "4001e032",
"default": "1",
Expand Down
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