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3 bug fixes #113

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87b8aa5
* ciout store byte to be transmitted in TBTCNT, because that is whe…
dmantione Mar 19, 2026
47df200
* Document the use of TBTCNT rather than BSOUR for serial output.
dmantione Mar 30, 2026
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9 changes: 9 additions & 0 deletions STATUS.md
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Expand Up @@ -47,6 +47,15 @@ The following ROM features are currently missing:
* RS-232 support
* NMI handling is incomplete

# Features implemented differently

## Serial buffer byte location

The KERNAL CIOUT routine buffers the byte to be sent into a zero page location, because only when the next byte is sent

@FeralChild64 FeralChild64 Mar 31, 2026

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The chapter is not necessary - a short note in the table below is what we need :)

Image

or when UNLSN occurs, it is known whether the byte should be sent with EOI or not. In the CBM KERNAL, this location is
BSOUR ($0095). The Open ROM KERNAL, this location is TBTCNT ($00A4).

The CBM KERNAL already uses TBTCNT for serial input, so using it for output as well, could be more consistent.

# Hardware support status

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5 changes: 4 additions & 1 deletion src/kernal/iec/ciout.s
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Expand Up @@ -29,8 +29,11 @@ CIOUT:
ciout_store_in_buffer:

; Store in the buffer data to be sent next, return
;
; The CBM KERNAL uses BSOUR to buffer the byte. As a result of the clean-room
; process, it happened that our tx code uses TBTCNT.
pla
sta BSOUR
sta TBTCNT
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rts

ciout_send_byte:
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6 changes: 5 additions & 1 deletion src/kernal/iec/iec_tx_flush.s
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Expand Up @@ -16,7 +16,11 @@ iec_tx_flush:
lda C3PO
beq @1
sec ; send it with EOI
jsr iec_tx_byte ; send the command regardless of the status
!ifdef CONFIG_IEC_JIFFYDOS {
jsr iec_tx_dispatch ; send the command regardless of the status
} else {
jsr iec_tx_byte
}
@1:
pla
rts
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9 changes: 5 additions & 4 deletions src/kernal/iec_fast/jiffydos_tx_byte.s
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Expand Up @@ -61,17 +61,18 @@ jiffydos_tx_byte:
ora C3PO
sta CIA2_PRA ; bits 6 and 7 on CLK/DATA

; Send low nibble; cycles: 4 + 3 + 4 + 2 + 2 + 2 + 4 = 21
; Send low nibble; cycles: 4 + 3 + 4 + 2 + 2 + 2 + 3 + 4 = 24
pla ; retrieve low nibble from stack
ora C3PO ; restore VIC-II and RS-232 bits
sta CIA2_PRA
lsr
lsr
and #%00110000 ; clear everything but CLK/DATA
ora C3PO
sta CIA2_PRA

; Signal EOI if needed; cycles till no EOI: 3 + 3 + 2 + 2 + 4 = 14
lda C3PO
; Signal EOI if needed; cycles till no EOI: 2 + 3 + 2 + 2 + 4 = 13
and #%00000011
ldx IECPROTO
beq jiffydos_tx_byte_wait_eoi

Expand Down Expand Up @@ -100,7 +101,7 @@ jiffydos_tx_byte_wait_eoi:
sta CIA2_PRA
jsr iec_wait20us
lda C3PO

; According to protocol analysis by Michael Steil (step S8) we should pull the DATA here
; to signal there was no error; but DATA pulled by the controller is a normal state
; (which should be stored in C3PO), so there is nothing to do here.
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