diff --git a/CMakeLists.txt b/CMakeLists.txt index bfe5fd91..8cf7164a 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -10,6 +10,8 @@ find_package(BISON 3.0.4 REQUIRED) if (APPLE) set(cxxlib libc++) set(force_compiler "compiler=apple-clang") + include_directories(/usr/local/include) + link_directories(/usr/local/lib) else () set(cxxlib libstdc++11) set(force_compiler "") @@ -48,3 +50,4 @@ add_subdirectory(share) add_subdirectory(src) add_subdirectory(test) add_subdirectory(tools) + diff --git a/setup b/setup index 05eedf54..ea959122 100755 --- a/setup +++ b/setup @@ -277,18 +277,18 @@ case "${unameOut}" in esac fi export CPP="g++ -E" - if [ ! -d "/usr/include" ]; then - if [ $SILENT -eq 1 ]; then - echo "Your /usr/include directly does not seem to be configured correctly (CI ignored)." - else - echo "Your /usr/include directly does not seem to be configured correctly." - OS_VERSION=$(sw_vers -productVersion | sed "s:.[[:digit:]]*.$::g") - HEADERS_INSTALL_PATH="/Library/Developer/CommandLineTools/Packages/macOS_SDK_headers_for_macOS_${OS_VERSION}.pkg" - echo "Try installing the package manually by running:" - echo "${WHITE}open ${HEADERS_INSTALL_PATH}${NC}" - exit 1 - fi - fi + #if [ ! -d "/usr/include" ]; then + # if [ $SILENT -eq 1 ]; then + # echo "Your /usr/include directly does not seem to be configured correctly (CI ignored)." + # else + # echo "Your /usr/include directly does not seem to be configured correctly." + # OS_VERSION=$(sw_vers -productVersion | sed "s:.[[:digit:]]*.$::g") + # HEADERS_INSTALL_PATH="/Library/Developer/CommandLineTools/Packages/macOS_SDK_headers_for_macOS_${OS_VERSION}.pkg" + # echo "Try installing the package manually by running:" + # echo "${WHITE}open ${HEADERS_INSTALL_PATH}${NC}" + # exit 1 + # fi + #fi build_cascade "-DFLEX_EXECUTABLE=/usr/local/opt/flex/bin/flex -DBISON_EXECUTABLE=/usr/local/opt/bison/bin/bison -DFLEX_INCLUDE_DIR=/usr/local/opt/flex/include" ;; diff --git a/share/cascade/de10/ip/program_logic.v b/share/cascade/de10/ip/program_logic.v new file mode 100644 index 00000000..e55bbe7f --- /dev/null +++ b/share/cascade/de10/ip/program_logic.v @@ -0,0 +1,12 @@ +module program_logic( + input wire clk, + input wire reset, + input wire[15:0] s0_address, + input wire s0_read, + input wire s0_write, + output wire[15:0] s0_readdata, + input wire [15:0] s0_writedata, + output wire s0_waitrequest +); + // Does nothing +endmodule diff --git a/share/cascade/de10/software/spl_bsp/Makefile b/share/cascade/de10/software/spl_bsp/Makefile deleted file mode 100644 index ed144068..00000000 --- a/share/cascade/de10/software/spl_bsp/Makefile +++ /dev/null @@ -1,323 +0,0 @@ -############################################################################### -# -# Altera SoC EDS Preloader/UBoot Build System -# -# Copyright (c) 2013,2014 Altera Corporation -# All Rights Reserved -# -############################################################################### - - -############################################################################### -# -# Generated Variables -# - -PRELOADER_SETTINGS_DIR := ../../hps_isw_handoff/soc_system_hps_0 - -TGZ := $(SOCEDS_DEST_ROOT)/host_tools/altera/preloader/uboot-socfpga.tar.gz - -CROSS_COMPILE := arm-altera-eabi- - -DEVICE_FAMILY := cyclone5 - -############################################################################### - - -############################################################################### -# -# Derived Variables -# - -MAKE_ARGS += CROSS_COMPILE=$(CROSS_COMPILE) - -PRELOADER_SRC_DIR := $(patsubst %.tar.gz,%,$(shell basename $(TGZ))) - -PRELOADER_UPDATE_DIR := $(PRELOADER_SRC_DIR)/board/altera/socfpga - -SOCFPGA_BOARD_CONFIG := socfpga_$(DEVICE_FAMILY)_config - -############################################################################### - - -############################################################################### -# -# Tools -# - -CAT := cat -CHMOD := chmod -CP := cp -rf -DIFF := diff -ECHO := echo -PATCH := patch -MKDIR := mkdir -p -RM := rm -rf -TOUCH := touch -UNTAR := tar zxf - -############################################################################### - - -############################################################################### -# -# Helper Variables and Functions -# - -STAMP_DIR ?= $(PRELOADER_SRC_DIR) - -define stamp -@$(MKDIR) $(@D) -@$(TOUCH) $@ -endef - -define untar_recipe -$(UNTAR) $(if $1,$1,$(if $<,$<,$(error ERROR: no input provided to gnu make function untar_recipe))) -endef - -# Stamps -UNTAR_SRC := $(STAMP_DIR)/.untar -CONFIG := $(STAMP_DIR)/.config -PATCH_APPLY := $(STAMP_DIR)/.patch - -############################################################################### - - -############################################################################### -# -# Windows Support -# -# -HOSTOS := $(shell uname -o 2>/dev/null | tr [:upper:] [:lower:]) - -ifeq ($(HOSTOS),cygwin) - -# When using UBoot build system on Windows it's good idea to use cygwin's GNU make -MAKE := $(shell cygpath -m "/bin/make") -MAKE_ARGS += MAKE=/bin/make - -CYGPATH := $(shell cygpath -m "$(shell which cygpath)") -MAKE_ARGS += CYGPATH=$(CYGPATH) - -UNAME_M := $(shell uname -m) -ifeq ($(UNAME_M),x86_64) -HOST_CROSS_COMPILE := x86_64-w64-mingw32- -else -HOST_CROSS_COMPILE := i686-pc-mingw32- -endif - -MAKE_ARGS += HOSTCC=$(HOST_CROSS_COMPILE)gcc HOSTSTRIP=$(HOST_CROSS_COMPILE)strip - -# Under cygwin, overload the untar_recipe function to use unix stype paths. This is required for cygwin tar -define untar_recipe -$(UNTAR) $(shell cygpath --unix "$(if $1,$1,$(if $<,$<,$(error ERROR: no input provided to gnu make function untar_recipe)))") -endef - -else # if HOSTOS != cygwin - -ifdef WINDIR -$(error ERROR: Windows build of preloader requires cygwin build environment. Ensure this makefile is executed from the SoC EDS Command Shell) -endif -ifdef windir -$(error ERROR: Windows build of preloader requires cygwin build environment. Ensure this makefile is executed from the SoC EDS Command Shell) -endif - -endif # HOSTOS == cygwin -############################################################################### - - -############################################################################### -# -# Source Files -# - -SDRAM_SOURCE_FILES := \ - alt_types.h \ - sdram_io.h \ - sequencer_auto_ac_init.c \ - sequencer_auto.h \ - sequencer_auto_inst_init.c \ - sequencer.c \ - sequencer_defines.h \ - sequencer.h \ - system.h \ - tclrpt.c \ - tclrpt.h - -GENERATED_SOURCE_FILES := \ - build.h \ - iocsr_config_$(DEVICE_FAMILY).c \ - iocsr_config_$(DEVICE_FAMILY).h \ - reset_config.h \ - pll_config.h \ - pinmux_config_$(DEVICE_FAMILY).c \ - pinmux_config.h \ - sdram/sdram_config.h - - -UPDATE_SDRAM_SOURCE_FILES := $(patsubst %,$(PRELOADER_UPDATE_DIR)/sdram/%,$(SDRAM_SOURCE_FILES)) - -UPDATE_GENERATED_SOURCE_FILES := $(patsubst %,$(PRELOADER_UPDATE_DIR)/%,$(GENERATED_SOURCE_FILES)) - -############################################################################### - - -############################################################################### -# -# Main build targets -# - -PRELOADER.BINARY := $(PRELOADER_SRC_DIR)/spl/u-boot-spl.bin -PRELOADER.MKPIMAGE_BINARY := preloader-mkpimage.bin -UBOOT.BINARY := $(PRELOADER_SRC_DIR)/u-boot.bin - -.PHONY: all -all: spl mkpimage-spl - -.PHONY: uboot -uboot: $(UBOOT.BINARY) - -$(UBOOT.BINARY): $(CONFIG) - $(MAKE) $(MAKE_ARGS) -C $(PRELOADER_SRC_DIR) - -.PHONY: spl -spl: $(PRELOADER.BINARY) - -$(PRELOADER.BINARY): $(CONFIG) - $(MAKE) $(MAKE_ARGS) -C $(PRELOADER_SRC_DIR) spl/u-boot-spl.bin - -.PHONY: mkpimage-spl -mkpimage-spl: $(PRELOADER.MKPIMAGE_BINARY) - -$(PRELOADER.MKPIMAGE_BINARY): $(PRELOADER.BINARY) - mkpimage --header-version 0 -o $@ $< $< $< $< - -.PHONY: tools -tools: $(CONFIG) - $(MAKE) $(MAKE_ARGS) -C $(PRELOADER_SRC_DIR) tools - - -############################################################################### - - -############################################################################### -# -# Untar, Update, & Configure Preloader Source -# - - -##### -# Untar -.PHONY: src -src: $(UNTAR_SRC) - -$(UNTAR_SRC): $(TGZ) - @$(RM) $(PRELOADER_SRC_DIR) - $(untar_recipe) - @$(CHMOD) -R 755 $(PRELOADER_SRC_DIR) - $(stamp) - -##### -# Update -.PHONY: update-src -update-src: $(UPDATE_SRC) - -UPDATE_SRC += $(UPDATE_GENERATED_SOURCE_FILES) $(UPDATE_SDRAM_SOURCE_FILES) - -$(UPDATE_SDRAM_SOURCE_FILES): $(PRELOADER_UPDATE_DIR)/sdram/%: $(PRELOADER_SETTINGS_DIR)/% $(UNTAR_SRC) $(PATCH.APPLY_TARGETS) - @$(MKDIR) $(@D) - @$(CP) -v $< $@ - -$(UPDATE_GENERATED_SOURCE_FILES): $(PRELOADER_UPDATE_DIR)/%: generated/% $(UNTAR_SRC) $(PATCH.APPLY_TARGETS) - @$(MKDIR) $(@D) - @$(CP) -v $< $@ - -##### -# Configure -.PHONY: config -config: $(CONFIG) - -$(CONFIG): $(UPDATE_SRC) $(UNTAR_SRC) $(PATCH_APPLY) - $(MAKE) $(MAKE_ARGS) -C $(PRELOADER_SRC_DIR) $(SOCFPGA_BOARD_CONFIG) - $(stamp) - -############################################################################### - - -############################################################################### -# -# Cleaning up -# - -.PHONY: clean -clean: -ifneq ($(wildcard $(PRELOADER_SRC_DIR)),) - $(MAKE) $(MAKE_ARGS) -C $(PRELOADER_SRC_DIR) mrproper -endif - $(RM) $(PRELOADER.MKPIMAGE_BINARY) $(CONFIG) - -.PHONY: clean-all -clean-all: - $(RM) $(PRELOADER_SRC_DIR) $(PRELOADER.MKPIMAGE_BINARY) $(CONFIG) $(PATCH_APPLY) $(UNTAR_SRC) - -############################################################################### - - -############################################################################### -# -# Applying patch files -# - -# GNU MAKE >= 3.81 is required to apply patch files correctly -.SECONDEXPANSION: - -# Patch files are discovered in current directory and in the directory adjacent -# to the tarball (TGZ) directory - -PATCH.FILES := $(strip \ - $(sort $(wildcard $(patsubst %.tar.gz,%.patch,$(TGZ))/*.patch)) \ - $(sort $(wildcard $(patsubst %.tar.gz,%.patch,$(TGZ))/$(HOSTOS)/*.patch)) \ - $(sort $(wildcard $(abspath .)/*.patch)) \ - $(EXTRA_PATCH_FILES)) - -PATCH.APPLY_TARGETS := $(strip $(foreach patchfile,$(PATCH.FILES), \ - $(eval patchfile_target := $(notdir $(basename $(patchfile)))) \ - $(eval $(patchfile_target).PATCH_FILE := $(patchfile)) \ - $(PRELOADER_SRC_DIR)/.applypatch.$(patchfile_target) \ -)) - -.PHONY: patch-apply -patch-apply: $(PATCH_APPLY) - -$(PATCH_APPLY): $(PATCH.APPLY_TARGETS) - $(stamp) - -$(PATCH.APPLY_TARGETS): $(PRELOADER_SRC_DIR)/.applypatch.%: $$(%.PATCH_FILE) $(UNTAR_SRC) - @$(ECHO) Applying Patch: $< - $(PATCH) -p1 --directory=$(PRELOADER_SRC_DIR) --input=$< - $(stamp) - -############################################################################### - - -############################################################################### -# -# Creating a patch file -# - -PATCH.USER_FILE := user.patch - -.PHONY: patch-create -patch-create: $(if $(PATCH.SKIP_CLEAN),,clean) -ifeq ($(wildcard $(PRELOADER_SRC_DIR).orig),) - $(error ERROR: $(PRELOADER_SRC_DIR).orig does not exist) -endif - $(DIFF) -rupN $(PRELOADER_SRC_DIR).orig/ $(PRELOADER_SRC_DIR)/ > $(PATCH.USER_FILE) || true -ifeq ($(HOSTOS),cygwin) - dos2unix $(PATCH.USER_FILE) -endif - $(CAT) $(PATCH.USER_FILE) - -############################################################################### - - diff --git a/share/cascade/de10/software/spl_bsp/generated/build.h b/share/cascade/de10/software/spl_bsp/generated/build.h deleted file mode 100644 index 385cf20d..00000000 --- a/share/cascade/de10/software/spl_bsp/generated/build.h +++ /dev/null @@ -1,172 +0,0 @@ -/* GENERATED FILE - DO NOT EDIT */ -/* - * Copyright Altera Corporation (C) 2012-2014. All rights reserved - * - * SPDX-License-Identifier: BSD-3-Clause - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Altera Corporation nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ALTERA CORPORATION BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _PRELOADER_BUILD_H_ -#define _PRELOADER_BUILD_H_ - -/* - * Boot option. 1 mean that particular boot mode is selected. - * Only 1 boot option to be enabled at any time - */ -#define CONFIG_PRELOADER_BOOT_FROM_QSPI (0) -#define CONFIG_PRELOADER_BOOT_FROM_SDMMC (1) -#define CONFIG_PRELOADER_BOOT_FROM_NAND (0) -#define CONFIG_PRELOADER_BOOT_FROM_RAM (0) - -/* - * Handoff files must provide image location of subsequent - * bootloader inside the boot devices / flashes - */ -#if (CONFIG_PRELOADER_BOOT_FROM_QSPI == 1) -#define CONFIG_PRELOADER_QSPI_NEXT_BOOT_IMAGE (0x60000) -#endif -#if (CONFIG_PRELOADER_BOOT_FROM_SDMMC == 1) -#define CONFIG_PRELOADER_SDMMC_NEXT_BOOT_IMAGE (0x40000) -#endif -#if (CONFIG_PRELOADER_BOOT_FROM_NAND == 1) -#define CONFIG_PRELOADER_NAND_NEXT_BOOT_IMAGE (0xc0000) -#endif - -/* Enable FAT partition support when booting from SDMMC. */ -#define CONFIG_PRELOADER_FAT_SUPPORT (0) - -/* - * When FAT partition support is enabled, this specifies the - * FAT partition where the boot image is located. - */ -#define CONFIG_PRELOADER_FAT_BOOT_PARTITION (1) - -/* - * When FAT partition supported is enabled, this specifies the - * boot image filename within a FAT partition to be used as - * fatload payload. - */ -#define CONFIG_PRELOADER_FAT_LOAD_PAYLOAD_NAME "u-boot.img" - -/* - * Handoff files must provide user option whether to - * enable watchdog during preloader execution phase - */ -#define CONFIG_PRELOADER_WATCHDOG_ENABLE (1) - -/* - * Handoff files must provide user option whether to enable - * debug memory write support - */ -#define CONFIG_PRELOADER_DEBUG_MEMORY_WRITE (0) -/* the base address of debug memory */ -#if (CONFIG_PRELOADER_DEBUG_MEMORY_WRITE == 1) -#define CONFIG_PRELOADER_DEBUG_MEMORY_ADDR (0xfffffd00) -#define CONFIG_PRELOADER_DEBUG_MEMORY_SIZE (0x200) -#endif - -/* Semihosting support in Preloader */ -#define CONFIG_PRELOADER_SEMIHOSTING (0) - -/* Option to check checksum of subsequent boot software image */ -#define CONFIG_PRELOADER_CHECKSUM_NEXT_IMAGE (1) - -/* - * Handoff files must provide user option whether to enable - * debug serial printout support - */ -#define CONFIG_PRELOADER_SERIAL_SUPPORT (1) - -/* - * Handoff files must provide user option whether to enable - * hardware diagnostic support - */ -#define CONFIG_PRELOADER_HARDWARE_DIAGNOSTIC (0) - -/* - * Preloader execute on FPGA. This is normally selected - * for BootROM FPGA boot where Preloader located on FPGA - */ -#define CONFIG_PRELOADER_EXE_ON_FPGA (0) -#if (CONFIG_PRELOADER_EXE_ON_FPGA == 1) -#define CONFIG_FPGA_MAX_SIZE (0x10000) -#define CONFIG_FPGA_DATA_BASE 0xffff0000 -#define CONFIG_FPGA_DATA_MAX_SIZE (0x10000) -#endif - -/* - * Add new option to force ramboot pll reset - */ -#define CONFIG_PRELOADER_RAMBOOT_PLLRESET (1) - -/* - * Enabled write STATE_VALID value to STATE_REG register to - * tell BootROM that Preloader run successfully. - */ -#define CONFIG_PRELOADER_STATE_REG_ENABLE (1) - -/* - * Enabled the handshake with BootROM when confiuring the IOCSR and pin mux. - * If enabled and warm reset happen in middle of Preloader configuring IOCSR - * and pin mux, BootROM will reconfigure the IOCSR and pin mux again. - */ -#define CONFIG_PRELOADER_BOOTROM_HANDSHAKE_CFGIO (1) - -/* - * If enabled, when warm reset happen and BootROM skipped configuring IOCSR - * and pin mux, Preloader will skip configuring the IOCSR and pin mux too. - */ -#define CONFIG_PRELOADER_WARMRST_SKIP_CFGIO (1) - -/* - * If enabled, Preloader will skip SDRAM initialization and calibration. - */ -#define CONFIG_PRELOADER_SKIP_SDRAM (0) - -/* - * To configure whether to scrub the SDRAM to initialize the ECC bits - */ -#define CONFIG_PRELOADER_SDRAM_SCRUBBING (0) - -/* To configure whether to scrub the SDRAM to initialize the ECC bits */ -#if (CONFIG_PRELOADER_SDRAM_SCRUBBING == 1) -/* - * The region of next stage boot image will be copied to - */ -#define CONFIG_PRELOADER_SDRAM_SCRUB_BOOT_REGION_START (0x1000000) -#define CONFIG_PRELOADER_SDRAM_SCRUB_BOOT_REGION_END (0x2000000) -/* - * Decide remaining region will be scrubbed. This will be done during the flash - * access (to load next boot image). The region is auto calculated based on the - * remain region. For SOCFPAGA, it would be 2 regions as below - * > CONFIG_SYS_SDRAM_BASE to CONFIG_SPL_SDRAM_SCRUB_BOOT_REGION_START - * > CONFIG_SPL_SDRAM_SCRUB_BOOT_REGION_END to calculated SDRAM size - */ -#define CONFIG_PRELOADER_SDRAM_SCRUB_REMAIN_REGION (1) - -#endif /* CONFIG_PRELOADER_SDRAM_SCRUBBING */ - -#endif /* _PRELOADER_BUILD_H_ */ - - diff --git a/share/cascade/de10/software/spl_bsp/generated/iocsr_config_cyclone5.c b/share/cascade/de10/software/spl_bsp/generated/iocsr_config_cyclone5.c deleted file mode 100644 index 13dd6bd1..00000000 --- a/share/cascade/de10/software/spl_bsp/generated/iocsr_config_cyclone5.c +++ /dev/null @@ -1,675 +0,0 @@ -/* GENERATED FILE - DO NOT EDIT */ -/* - * Copyright Altera Corporation (C) 2012-2014. All rights reserved - * - * SPDX-License-Identifier: BSD-3-Clause - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Altera Corporation nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ALTERA CORPORATION BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include - -const unsigned long iocsr_scan_chain0_table[((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH / 32) + 1)] = { - 0x00000000, - 0x00000000, - 0x0FF00000, - 0xC0000000, - 0x0000003F, - 0x00008000, - 0x00060180, - 0x18060000, - 0x18000000, - 0x00018060, - 0x00000000, - 0x00004000, - 0x000300C0, - 0x0C030000, - 0x0C000000, - 0x00000030, - 0x0000C030, - 0x00002000, - 0x00020000, - 0x06018000, - 0x06000000, - 0x00000018, - 0x00006018, - 0x00001000, -}; - -const unsigned long iocsr_scan_chain1_table[((CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH / 32) + 1)] = { - 0x00100000, - 0x300C0000, - 0x300000C0, - 0x000000C0, - 0x000300C0, - 0x00008000, - 0x00060180, - 0x20000000, - 0x00000000, - 0x00000080, - 0x00020000, - 0x00004000, - 0x000300C0, - 0x10000000, - 0x0C000000, - 0x00000030, - 0x0000C030, - 0x00002000, - 0x00020000, - 0x06018000, - 0x01FE0000, - 0xF8000000, - 0x00000007, - 0x00001000, - 0x00010000, - 0x04000000, - 0x00000000, - 0x00000010, - 0x00004000, - 0x00000800, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000008, - 0x00002000, - 0x00000400, - 0x00000000, - 0x00C03000, - 0x00000003, - 0x00000000, - 0x00000000, - 0x00000200, - 0x00601806, - 0x00000000, - 0x80600000, - 0x80000601, - 0x00000601, - 0x00000100, - 0x00300C03, - 0xC0300C00, - 0xC0300000, - 0xC0000300, - 0x000C0300, - 0x00000080, -}; - -const unsigned long iocsr_scan_chain2_table[((CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH / 32) + 1)] = { - 0x300C0300, - 0x00000000, - 0x0FF00000, - 0x00000000, - 0x000300C0, - 0x00008000, - 0x00080000, - 0x18060000, - 0x18000000, - 0x00018060, - 0x00020000, - 0x00004000, - 0x200300C0, - 0x10000000, - 0x00000000, - 0x00000040, - 0x00010000, - 0x00002000, - 0x10018060, - 0x06018000, - 0x06000000, - 0x00010018, - 0x00006018, - 0x00001000, - 0x00010000, - 0x00000000, - 0x03000000, - 0x0000800C, - 0x00C0300C, - 0x00000800, -}; - -const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH / 32) + 1)] = { - 0x0C420D80, - 0x082000FF, - 0x0A804001, - 0x07900000, - 0x08020000, - 0x00100000, - 0x0A800000, - 0x07900000, - 0x08020000, - 0x00100000, - 0xC8800000, - 0x00003001, - 0x00C00722, - 0x00000000, - 0x00000021, - 0x82000004, - 0x05400000, - 0x03C80000, - 0x04010000, - 0x00080000, - 0x05400000, - 0x03C80000, - 0x05400000, - 0x03C80000, - 0xE4400000, - 0x00001800, - 0x00600391, - 0x800E4400, - 0x00000001, - 0x40000002, - 0x02A00000, - 0x01E40000, - 0x02A00000, - 0x01E40000, - 0x02A00000, - 0x01E40000, - 0x02A00000, - 0x01E40000, - 0x72200000, - 0x80000C00, - 0x003001C8, - 0xC0072200, - 0x1C880000, - 0x20000300, - 0x00040000, - 0x50670000, - 0x00000010, - 0x24590000, - 0x00001000, - 0xA0000034, - 0x0D000001, - 0xC0680618, - 0x45034071, - 0x0A281A01, - 0x806180D0, - 0x34071C06, - 0x01A034D0, - 0x180D0000, - 0x71C06806, - 0x01450340, - 0xD000001A, - 0x0680E380, - 0x10040000, - 0x00200000, - 0x10040000, - 0x00200000, - 0x15000000, - 0x0F200000, - 0x15000000, - 0x0F200000, - 0x01FE0000, - 0x00000000, - 0x01800E44, - 0x00391000, - 0x007F8006, - 0x00000000, - 0x0A800001, - 0x07900000, - 0x0A800000, - 0x07900000, - 0x0A800000, - 0x07900000, - 0x08020000, - 0x00100000, - 0xC8800000, - 0x00003001, - 0x00C00722, - 0x00000FF0, - 0x72200000, - 0x80000C00, - 0x05400000, - 0x02480000, - 0x04000000, - 0x00080000, - 0x05400000, - 0x03C80000, - 0x05400000, - 0x03C80000, - 0x6A1C0000, - 0x00001800, - 0x00600391, - 0x800E4400, - 0x1A870001, - 0x40000600, - 0x02A00040, - 0x01E40000, - 0x02A00000, - 0x01E40000, - 0x02A00000, - 0x01E40000, - 0x02A00000, - 0x01E40000, - 0x72200000, - 0x80000C00, - 0x003001C8, - 0xC0072200, - 0x1C880000, - 0x20000300, - 0x00040000, - 0x50670000, - 0x00000010, - 0x24590000, - 0x00001000, - 0xA0000034, - 0x0D000001, - 0xC0680618, - 0x45034071, - 0x0A281A01, - 0x806180D0, - 0x34071C06, - 0x01A00040, - 0x180D0002, - 0x71C06806, - 0x01450340, - 0xD00A281A, - 0x06806180, - 0x10040000, - 0x00200000, - 0x10040000, - 0x00200000, - 0x15000000, - 0x0F200000, - 0x15000000, - 0x0F200000, - 0x01FE0000, - 0x00000000, - 0x01800E44, - 0x00391000, - 0x007F8006, - 0x00000000, - 0x99300001, - 0x34343400, - 0xAA0D4000, - 0x01C3A800, - 0xAA0D4000, - 0x01C3A800, - 0xAA0D4000, - 0x01C3A800, - 0x00040100, - 0x00000800, - 0x00000000, - 0x00001208, - 0x00482000, - 0x01000000, - 0x00000000, - 0x00410482, - 0x0006A000, - 0x0001B400, - 0x00020000, - 0x00000400, - 0x0002A000, - 0x0001E400, - 0x5506A000, - 0x00E1D400, - 0x00000000, - 0xC880090C, - 0x00003001, - 0x90400000, - 0x00000000, - 0x2020C243, - 0x2A835000, - 0x0070EA00, - 0x2A835000, - 0x0070EA00, - 0x2A835000, - 0x0070EA00, - 0x00010040, - 0x00000200, - 0x00000000, - 0x00000482, - 0x00120800, - 0x00002000, - 0x80000000, - 0x00104120, - 0x00000200, - 0xAC0D5F80, - 0xFFFFFFFF, - 0x14F3690D, - 0x1A041414, - 0x00D00000, - 0x0C864000, - 0x79E47A03, - 0xCAAAA3DD, - 0xF6D5551E, - 0x0352D348, - 0x821A0000, - 0x0000D000, - 0x030C0680, - 0xD559647A, - 0x1ECAAAA3, - 0xC8F6D965, - 0x00034AB2, - 0x00080200, - 0x00001000, - 0x00080200, - 0x00001000, - 0x000A8000, - 0x00075000, - 0x541A8000, - 0x03875001, - 0x10000000, - 0x00000000, - 0x0080C000, - 0x41000000, - 0x00003FC2, - 0x00820000, - 0xAA0D4000, - 0x01C3A800, - 0xAA0D4000, - 0x01C3A800, - 0xAA0D4000, - 0x01C3A800, - 0x00040100, - 0x00000800, - 0x00000000, - 0x00001208, - 0x00482000, - 0x00008000, - 0x00000000, - 0x00410482, - 0x0006A000, - 0x0001B400, - 0x00020000, - 0x00000400, - 0x00020080, - 0x00000400, - 0x5506A000, - 0x00E1D400, - 0x00000000, - 0x0000090C, - 0x00000010, - 0x90400000, - 0x00000000, - 0x2020C243, - 0x2A835000, - 0x0070EA00, - 0x2A835000, - 0x0070EA00, - 0x2A835000, - 0x0070EA00, - 0x00015000, - 0x0000F200, - 0x00000000, - 0x00000482, - 0x00120800, - 0x00600391, - 0x80000000, - 0x00104120, - 0x00000200, - 0xAC0D5F80, - 0xFFFFFFFF, - 0x14F3690D, - 0x1A041414, - 0x00D00000, - 0x0C864000, - 0x79E47A03, - 0x8B2CA3DD, - 0xF6D9651E, - 0x034AB2C8, - 0x821A0041, - 0x0000D000, - 0x00000680, - 0xD559647A, - 0x1E8B2CA3, - 0xC8F6D965, - 0x00034AB2, - 0x00080200, - 0x00001000, - 0x00080200, - 0x00001000, - 0x000A8000, - 0x00075000, - 0x541A8000, - 0x03875001, - 0x10000000, - 0x00000000, - 0x0080C000, - 0x41000000, - 0x04000002, - 0x00820000, - 0xAA0D4000, - 0x01C3A800, - 0xAA0D4000, - 0x01C3A800, - 0xAA0D4000, - 0x01C3A800, - 0x00040100, - 0x00000800, - 0x00000000, - 0x00001208, - 0x00482000, - 0x00008000, - 0x00000000, - 0x00410482, - 0x0006A000, - 0x0001B400, - 0x00020000, - 0x00000400, - 0x0002A000, - 0x0001E400, - 0x5506A000, - 0x00E1D400, - 0x00000000, - 0xC880090C, - 0x00003001, - 0x90400000, - 0x00000000, - 0x2020C243, - 0x2A835000, - 0x0070EA00, - 0x2A835000, - 0x0070EA00, - 0x2A835000, - 0x0070EA00, - 0x00010040, - 0x00000200, - 0x00000000, - 0x00000482, - 0x00120800, - 0x00002000, - 0x80000000, - 0x00104120, - 0x00000200, - 0xAC0D5F80, - 0xFFFFFFFF, - 0x14F3690D, - 0x1A041414, - 0x00D00000, - 0x14864000, - 0x59647A05, - 0x8AAAA3D5, - 0xF6D9651E, - 0x034AB2C8, - 0x821A0000, - 0x0000D000, - 0x00000680, - 0xD559647A, - 0x1E8B2CA3, - 0xC8F6D965, - 0x00034AB2, - 0x00080200, - 0x00001000, - 0x00080200, - 0x00001000, - 0x000A8000, - 0x00075000, - 0x541A8000, - 0x03875001, - 0x10000000, - 0x00000000, - 0x0080C000, - 0x41000000, - 0x04000002, - 0x00820000, - 0xAA0D4000, - 0x01C3A800, - 0xAA0D4000, - 0x01C3A800, - 0xAA0D4000, - 0x01C3A800, - 0x00040100, - 0x00000800, - 0x00000000, - 0x00001208, - 0x00482000, - 0x00008000, - 0x00000000, - 0x00410482, - 0x0006A000, - 0x0001B400, - 0x00020000, - 0x00000400, - 0x00020080, - 0x00000400, - 0x5506A000, - 0x00E1D400, - 0x00000000, - 0x0000090C, - 0x00000010, - 0x90400000, - 0x00000000, - 0x2020C243, - 0x2A835000, - 0x0070EA00, - 0x2A835000, - 0x0070EA00, - 0x2A835000, - 0x0070EA00, - 0x00010040, - 0x00000200, - 0x00000000, - 0x00000482, - 0x00120800, - 0x00400000, - 0x80000000, - 0x00104120, - 0x00000200, - 0xAC0D5F80, - 0xFFFFFFFF, - 0x14F1690D, - 0x1A041414, - 0x00D00000, - 0x14864000, - 0x59647A05, - 0x8B2CA3D5, - 0xF6D9651E, - 0x0352D348, - 0x821A0000, - 0x0000D000, - 0x00000680, - 0xD559647A, - 0x1E8B2CA3, - 0x48F6D965, - 0x000352D3, - 0x00080200, - 0x00001000, - 0x00080200, - 0x00001000, - 0x000A8000, - 0x00075000, - 0x541A8000, - 0x03875001, - 0x10000000, - 0x00000000, - 0x0080C000, - 0x41000000, - 0x04000002, - 0x00820000, - 0x00489800, - 0x801A1A1A, - 0x00000200, - 0x80000004, - 0x00000200, - 0x80000004, - 0x00000200, - 0x80000004, - 0x00000200, - 0x00000004, - 0x00040000, - 0x10000000, - 0x00000000, - 0x00000040, - 0x00010000, - 0x40002000, - 0x00000100, - 0x40000002, - 0x00000100, - 0x40000002, - 0x00000100, - 0x40000002, - 0x00000100, - 0x00000002, - 0x00020000, - 0x08000000, - 0x00000000, - 0x00000020, - 0x00008000, - 0x20001000, - 0x00000080, - 0x20000001, - 0x00000080, - 0x20000001, - 0x00000080, - 0x20000001, - 0x00000080, - 0x00000001, - 0x00010000, - 0x04000000, - 0x00FF0000, - 0x00000000, - 0x00004000, - 0x00000800, - 0xC0000001, - 0x00041419, - 0x40000000, - 0x04000816, - 0x000D0000, - 0x00006800, - 0x00000340, - 0xD000001A, - 0x06800000, - 0x00340000, - 0x0001A000, - 0x00000D00, - 0x40000068, - 0x1A000003, - 0x00D00000, - 0x00068000, - 0x00003400, - 0x000001A0, - 0x00000401, - 0x00000008, - 0x00000401, - 0x00000008, - 0x00000401, - 0x00000008, - 0x00000401, - 0x80000008, - 0x0000007F, - 0x20000000, - 0x00000000, - 0xE0000080, - 0x0000001F, - 0x00004000, -}; - diff --git a/share/cascade/de10/software/spl_bsp/generated/iocsr_config_cyclone5.h b/share/cascade/de10/software/spl_bsp/generated/iocsr_config_cyclone5.h deleted file mode 100644 index a4401067..00000000 --- a/share/cascade/de10/software/spl_bsp/generated/iocsr_config_cyclone5.h +++ /dev/null @@ -1,38 +0,0 @@ -/* GENERATED FILE - DO NOT EDIT */ -/* - * Copyright Altera Corporation (C) 2012-2014. All rights reserved - * - * SPDX-License-Identifier: BSD-3-Clause - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Altera Corporation nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ALTERA CORPORATION BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _PRELOADER_IOCSR_CONFIG_H_ -#define _PRELOADER_IOCSR_CONFIG_H_ - -#define CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH (764) -#define CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH (1719) -#define CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH (955) -#define CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH (16766) - -#endif /*_PRELOADER_IOCSR_CONFIG_H_*/ diff --git a/share/cascade/de10/software/spl_bsp/generated/pinmux_config.h b/share/cascade/de10/software/spl_bsp/generated/pinmux_config.h deleted file mode 100644 index 20613762..00000000 --- a/share/cascade/de10/software/spl_bsp/generated/pinmux_config.h +++ /dev/null @@ -1,75 +0,0 @@ -/* GENERATED FILE - DO NOT EDIT */ -/* - * Copyright Altera Corporation (C) 2012-2014. All rights reserved - * - * SPDX-License-Identifier: BSD-3-Clause - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Altera Corporation nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ALTERA CORPORATION BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _PRELOADER_PINMUX_CONFIG_H_ -#define _PRELOADER_PINMUX_CONFIG_H_ - -#define CONFIG_HPS_EMAC0 (0) -#define CONFIG_HPS_EMAC1 (1) -#define CONFIG_HPS_USB0 (0) -#define CONFIG_HPS_USB1 (1) -#define CONFIG_HPS_NAND (0) -#define CONFIG_HPS_SDMMC (1) -#define CONFIG_HPS_QSPI (0) -#define CONFIG_HPS_UART0 (1) -#define CONFIG_HPS_UART1 (0) -#define CONFIG_HPS_TRACE (0) -#define CONFIG_HPS_I2C0 (1) -#define CONFIG_HPS_I2C1 (1) -#define CONFIG_HPS_I2C2 (0) -#define CONFIG_HPS_I2C3 (0) -#define CONFIG_HPS_SPIM0 (0) -#define CONFIG_HPS_SPIM1 (1) -#define CONFIG_HPS_SPIS0 (0) -#define CONFIG_HPS_SPIS1 (0) -#define CONFIG_HPS_CAN0 (0) -#define CONFIG_HPS_CAN1 (0) - -#define CONFIG_HPS_SDMMC_BUSWIDTH (4) - -#define CONFIG_HPS_QSPI_CS3 (0) -#define CONFIG_HPS_QSPI_CS2 (0) -#define CONFIG_HPS_QSPI_CS1 (0) -#define CONFIG_HPS_QSPI_CS0 (0) - -#define CONFIG_HPS_UART0_TX (1) -#define CONFIG_HPS_UART0_CTS (0) -#define CONFIG_HPS_UART0_RTS (0) -#define CONFIG_HPS_UART0_RX (1) - -#define CONFIG_HPS_UART1_TX (0) -#define CONFIG_HPS_UART1_CTS (0) -#define CONFIG_HPS_UART1_RTS (0) -#define CONFIG_HPS_UART1_RX (0) - - -/* Pin MUX data */ -#define CONFIG_HPS_PINMUX_NUM (207) - -#endif /* _PRELOADER_PINMUX_CONFIG_H_ */ diff --git a/share/cascade/de10/software/spl_bsp/generated/pinmux_config_cyclone5.c b/share/cascade/de10/software/spl_bsp/generated/pinmux_config_cyclone5.c deleted file mode 100644 index 782c264e..00000000 --- a/share/cascade/de10/software/spl_bsp/generated/pinmux_config_cyclone5.c +++ /dev/null @@ -1,241 +0,0 @@ -/* GENERATED FILE - DO NOT EDIT */ -/* - * Copyright Altera Corporation (C) 2012-2014. All rights reserved - * - * SPDX-License-Identifier: BSD-3-Clause - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Altera Corporation nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ALTERA CORPORATION BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include - -/* pin MUX configuration data */ -unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = { - 0, /* EMACIO0 */ - 2, /* EMACIO1 */ - 2, /* EMACIO2 */ - 2, /* EMACIO3 */ - 2, /* EMACIO4 */ - 2, /* EMACIO5 */ - 2, /* EMACIO6 */ - 2, /* EMACIO7 */ - 2, /* EMACIO8 */ - 0, /* EMACIO9 */ - 2, /* EMACIO10 */ - 2, /* EMACIO11 */ - 2, /* EMACIO12 */ - 2, /* EMACIO13 */ - 0, /* EMACIO14 */ - 0, /* EMACIO15 */ - 0, /* EMACIO16 */ - 0, /* EMACIO17 */ - 0, /* EMACIO18 */ - 0, /* EMACIO19 */ - 3, /* FLASHIO0 */ - 0, /* FLASHIO1 */ - 3, /* FLASHIO2 */ - 3, /* FLASHIO3 */ - 0, /* FLASHIO4 */ - 0, /* FLASHIO5 */ - 0, /* FLASHIO6 */ - 0, /* FLASHIO7 */ - 0, /* FLASHIO8 */ - 3, /* FLASHIO9 */ - 3, /* FLASHIO10 */ - 3, /* FLASHIO11 */ - 0, /* GENERALIO0 */ - 1, /* GENERALIO1 */ - 1, /* GENERALIO2 */ - 1, /* GENERALIO3 */ - 1, /* GENERALIO4 */ - 0, /* GENERALIO5 */ - 0, /* GENERALIO6 */ - 1, /* GENERALIO7 */ - 1, /* GENERALIO8 */ - 0, /* GENERALIO9 */ - 0, /* GENERALIO10 */ - 0, /* GENERALIO11 */ - 0, /* GENERALIO12 */ - 0, /* GENERALIO13 */ - 0, /* GENERALIO14 */ - 1, /* GENERALIO15 */ - 1, /* GENERALIO16 */ - 1, /* GENERALIO17 */ - 1, /* GENERALIO18 */ - 0, /* GENERALIO19 */ - 0, /* GENERALIO20 */ - 0, /* GENERALIO21 */ - 0, /* GENERALIO22 */ - 0, /* GENERALIO23 */ - 0, /* GENERALIO24 */ - 0, /* GENERALIO25 */ - 0, /* GENERALIO26 */ - 0, /* GENERALIO27 */ - 0, /* GENERALIO28 */ - 0, /* GENERALIO29 */ - 0, /* GENERALIO30 */ - 0, /* GENERALIO31 */ - 2, /* MIXED1IO0 */ - 2, /* MIXED1IO1 */ - 2, /* MIXED1IO2 */ - 2, /* MIXED1IO3 */ - 2, /* MIXED1IO4 */ - 2, /* MIXED1IO5 */ - 2, /* MIXED1IO6 */ - 2, /* MIXED1IO7 */ - 2, /* MIXED1IO8 */ - 2, /* MIXED1IO9 */ - 2, /* MIXED1IO10 */ - 2, /* MIXED1IO11 */ - 2, /* MIXED1IO12 */ - 2, /* MIXED1IO13 */ - 0, /* MIXED1IO14 */ - 0, /* MIXED1IO15 */ - 0, /* MIXED1IO16 */ - 0, /* MIXED1IO17 */ - 0, /* MIXED1IO18 */ - 0, /* MIXED1IO19 */ - 0, /* MIXED1IO20 */ - 0, /* MIXED1IO21 */ - 0, /* MIXED2IO0 */ - 0, /* MIXED2IO1 */ - 0, /* MIXED2IO2 */ - 0, /* MIXED2IO3 */ - 0, /* MIXED2IO4 */ - 0, /* MIXED2IO5 */ - 0, /* MIXED2IO6 */ - 0, /* MIXED2IO7 */ - 0, /* GPLINMUX48 */ - 0, /* GPLINMUX49 */ - 0, /* GPLINMUX50 */ - 0, /* GPLINMUX51 */ - 0, /* GPLINMUX52 */ - 0, /* GPLINMUX53 */ - 0, /* GPLINMUX54 */ - 0, /* GPLINMUX55 */ - 0, /* GPLINMUX56 */ - 0, /* GPLINMUX57 */ - 0, /* GPLINMUX58 */ - 0, /* GPLINMUX59 */ - 0, /* GPLINMUX60 */ - 0, /* GPLINMUX61 */ - 0, /* GPLINMUX62 */ - 0, /* GPLINMUX63 */ - 0, /* GPLINMUX64 */ - 0, /* GPLINMUX65 */ - 0, /* GPLINMUX66 */ - 0, /* GPLINMUX67 */ - 0, /* GPLINMUX68 */ - 0, /* GPLINMUX69 */ - 0, /* GPLINMUX70 */ - 1, /* GPLMUX0 */ - 1, /* GPLMUX1 */ - 1, /* GPLMUX2 */ - 1, /* GPLMUX3 */ - 1, /* GPLMUX4 */ - 1, /* GPLMUX5 */ - 1, /* GPLMUX6 */ - 1, /* GPLMUX7 */ - 1, /* GPLMUX8 */ - 1, /* GPLMUX9 */ - 1, /* GPLMUX10 */ - 1, /* GPLMUX11 */ - 1, /* GPLMUX12 */ - 1, /* GPLMUX13 */ - 1, /* GPLMUX14 */ - 1, /* GPLMUX15 */ - 1, /* GPLMUX16 */ - 1, /* GPLMUX17 */ - 1, /* GPLMUX18 */ - 1, /* GPLMUX19 */ - 1, /* GPLMUX20 */ - 1, /* GPLMUX21 */ - 1, /* GPLMUX22 */ - 1, /* GPLMUX23 */ - 1, /* GPLMUX24 */ - 1, /* GPLMUX25 */ - 1, /* GPLMUX26 */ - 1, /* GPLMUX27 */ - 1, /* GPLMUX28 */ - 1, /* GPLMUX29 */ - 1, /* GPLMUX30 */ - 1, /* GPLMUX31 */ - 1, /* GPLMUX32 */ - 1, /* GPLMUX33 */ - 1, /* GPLMUX34 */ - 1, /* GPLMUX35 */ - 1, /* GPLMUX36 */ - 1, /* GPLMUX37 */ - 1, /* GPLMUX38 */ - 1, /* GPLMUX39 */ - 1, /* GPLMUX40 */ - 1, /* GPLMUX41 */ - 1, /* GPLMUX42 */ - 1, /* GPLMUX43 */ - 1, /* GPLMUX44 */ - 1, /* GPLMUX45 */ - 1, /* GPLMUX46 */ - 1, /* GPLMUX47 */ - 1, /* GPLMUX48 */ - 1, /* GPLMUX49 */ - 1, /* GPLMUX50 */ - 1, /* GPLMUX51 */ - 1, /* GPLMUX52 */ - 1, /* GPLMUX53 */ - 1, /* GPLMUX54 */ - 1, /* GPLMUX55 */ - 1, /* GPLMUX56 */ - 1, /* GPLMUX57 */ - 1, /* GPLMUX58 */ - 1, /* GPLMUX59 */ - 1, /* GPLMUX60 */ - 1, /* GPLMUX61 */ - 1, /* GPLMUX62 */ - 1, /* GPLMUX63 */ - 1, /* GPLMUX64 */ - 1, /* GPLMUX65 */ - 1, /* GPLMUX66 */ - 1, /* GPLMUX67 */ - 1, /* GPLMUX68 */ - 1, /* GPLMUX69 */ - 1, /* GPLMUX70 */ - 0, /* NANDUSEFPGA */ - 0, /* UART0USEFPGA */ - 0, /* RGMII1USEFPGA */ - 0, /* SPIS0USEFPGA */ - 0, /* CAN0USEFPGA */ - 0, /* I2C0USEFPGA */ - 0, /* SDMMCUSEFPGA */ - 0, /* QSPIUSEFPGA */ - 0, /* SPIS1USEFPGA */ - 0, /* RGMII0USEFPGA */ - 0, /* UART1USEFPGA */ - 0, /* CAN1USEFPGA */ - 0, /* USB1USEFPGA */ - 0, /* I2C3USEFPGA */ - 0, /* I2C2USEFPGA */ - 0, /* I2C1USEFPGA */ - 0, /* SPIM1USEFPGA */ - 0, /* USB0USEFPGA */ - 0 /* SPIM0USEFPGA */ -}; \ No newline at end of file diff --git a/share/cascade/de10/software/spl_bsp/generated/pll_config.h b/share/cascade/de10/software/spl_bsp/generated/pll_config.h deleted file mode 100644 index 244287b3..00000000 --- a/share/cascade/de10/software/spl_bsp/generated/pll_config.h +++ /dev/null @@ -1,108 +0,0 @@ -/* GENERATED FILE - DO NOT EDIT */ -/* - * Copyright Altera Corporation (C) 2012-2014. All rights reserved - * - * SPDX-License-Identifier: BSD-3-Clause - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Altera Corporation nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ALTERA CORPORATION BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _PRELOADER_PLL_CONFIG_H_ -#define _PRELOADER_PLL_CONFIG_H_ - -#define CONFIG_HPS_DBCTRL_STAYOSC1 (1) - -#define CONFIG_HPS_MAINPLLGRP_VCO_DENOM (0) -#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER (73) -#define CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT (0) -#define CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT (0) -#define CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT (0) -#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT (511) -#define CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT (511) -#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT (18) -#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK (1) -#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK (1) -#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK (1) -#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK (1) -#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK (0) -#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK (1) -#define CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK (0) -#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP (1) -#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP (1) - -#define CONFIG_HPS_PERPLLGRP_VCO_DENOM (0) -#define CONFIG_HPS_PERPLLGRP_VCO_NUMER (39) -#define CONFIG_HPS_PERPLLGRP_VCO_PSRC (0) -#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT (511) -#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT (3) -#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT (511) -#define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT (4) -#define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT (4) -#define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT (511) -#define CONFIG_HPS_PERPLLGRP_DIV_USBCLK (0) -#define CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK (0) -#define CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK (4) -#define CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK (4) -#define CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK (6249) -#define CONFIG_HPS_PERPLLGRP_SRC_SDMMC (2) -#define CONFIG_HPS_PERPLLGRP_SRC_NAND (2) -#define CONFIG_HPS_PERPLLGRP_SRC_QSPI (1) - -#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM (0) -#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER (31) -#define CONFIG_HPS_SDRPLLGRP_VCO_SSRC (0) -#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT (1) -#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE (0) -#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT (0) -#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE (0) -#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT (1) -#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE (4) -#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT (4) -#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE (0) - -#define CONFIG_HPS_CLK_OSC1_HZ (25000000) -#define CONFIG_HPS_CLK_OSC2_HZ (25000000) -#define CONFIG_HPS_CLK_F2S_SDR_REF_HZ (0) -#define CONFIG_HPS_CLK_F2S_PER_REF_HZ (0) -#define CONFIG_HPS_CLK_MAINVCO_HZ (1850000000) -#define CONFIG_HPS_CLK_PERVCO_HZ (1000000000) -#define CONFIG_HPS_CLK_SDRVCO_HZ (800000000) -#define CONFIG_HPS_CLK_EMAC0_HZ (1953125) -#define CONFIG_HPS_CLK_EMAC1_HZ (250000000) -#define CONFIG_HPS_CLK_USBCLK_HZ (200000000) -#define CONFIG_HPS_CLK_NAND_HZ (50000000) -#define CONFIG_HPS_CLK_SDMMC_HZ (200000000) -#define CONFIG_HPS_CLK_QSPI_HZ (3613281) -#define CONFIG_HPS_CLK_SPIM_HZ (200000000) -#define CONFIG_HPS_CLK_CAN0_HZ (12500000) -#define CONFIG_HPS_CLK_CAN1_HZ (12500000) -#define CONFIG_HPS_CLK_GPIODB_HZ (32000) -#define CONFIG_HPS_CLK_L4_MP_HZ (100000000) -#define CONFIG_HPS_CLK_L4_SP_HZ (100000000) - -#define CONFIG_HPS_ALTERAGRP_MPUCLK (1) -#define CONFIG_HPS_ALTERAGRP_MAINCLK (4) -#define CONFIG_HPS_ALTERAGRP_DBGATCLK (4) - -#endif /* _PRELOADER_PLL_CONFIG_H_ */ - diff --git a/share/cascade/de10/software/spl_bsp/generated/reset_config.h b/share/cascade/de10/software/spl_bsp/generated/reset_config.h deleted file mode 100644 index 905e0355..00000000 --- a/share/cascade/de10/software/spl_bsp/generated/reset_config.h +++ /dev/null @@ -1,82 +0,0 @@ -/* GENERATED FILE - DO NOT EDIT */ -/* - * Copyright Altera Corporation (C) 2012-2014. All rights reserved - * - * SPDX-License-Identifier: BSD-3-Clause - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Altera Corporation nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ALTERA CORPORATION BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _PRELOADER_RESET_CONFIG_H_ -#define _PRELOADER_RESET_CONFIG_H_ - -/* 1 mean that particular IP need to be kept under reset state */ -#define CONFIG_HPS_RESET_ASSERT_EMAC0 (1) -#define CONFIG_HPS_RESET_ASSERT_EMAC1 (0) -#define CONFIG_HPS_RESET_ASSERT_USB0 (1) -#define CONFIG_HPS_RESET_ASSERT_USB1 (0) -#define CONFIG_HPS_RESET_ASSERT_NAND (1) -#define CONFIG_HPS_RESET_ASSERT_SDMMC (0) -#define CONFIG_HPS_RESET_ASSERT_QSPI (1) -#define CONFIG_HPS_RESET_ASSERT_UART0 (0) -#define CONFIG_HPS_RESET_ASSERT_UART1 (1) -#define CONFIG_HPS_RESET_ASSERT_I2C0 (0) -#define CONFIG_HPS_RESET_ASSERT_I2C1 (0) -#define CONFIG_HPS_RESET_ASSERT_I2C2 (1) -#define CONFIG_HPS_RESET_ASSERT_I2C3 (1) -#define CONFIG_HPS_RESET_ASSERT_SPIM0 (1) -#define CONFIG_HPS_RESET_ASSERT_SPIM1 (0) -#define CONFIG_HPS_RESET_ASSERT_SPIS0 (1) -#define CONFIG_HPS_RESET_ASSERT_SPIS1 (1) -#define CONFIG_HPS_RESET_ASSERT_CAN0 (1) -#define CONFIG_HPS_RESET_ASSERT_CAN1 (1) -#define CONFIG_HPS_RESET_ASSERT_L4WD1 (0) -#define CONFIG_HPS_RESET_ASSERT_OSC1TIMER1 (0) -#define CONFIG_HPS_RESET_ASSERT_SPTIMER0 (0) -#define CONFIG_HPS_RESET_ASSERT_SPTIMER1 (0) -#define CONFIG_HPS_RESET_ASSERT_GPIO0 (0) -#define CONFIG_HPS_RESET_ASSERT_GPIO1 (0) -#define CONFIG_HPS_RESET_ASSERT_GPIO2 (0) -#define CONFIG_HPS_RESET_ASSERT_DMA (0) -#define CONFIG_HPS_RESET_ASSERT_SDR (0) - -#define CONFIG_HPS_RESET_ASSERT_FPGA_DMA0 (1) -#define CONFIG_HPS_RESET_ASSERT_FPGA_DMA1 (1) -#define CONFIG_HPS_RESET_ASSERT_FPGA_DMA2 (1) -#define CONFIG_HPS_RESET_ASSERT_FPGA_DMA3 (1) -#define CONFIG_HPS_RESET_ASSERT_FPGA_DMA4 (1) -#define CONFIG_HPS_RESET_ASSERT_FPGA_DMA5 (1) -#define CONFIG_HPS_RESET_ASSERT_FPGA_DMA6 (1) -#define CONFIG_HPS_RESET_ASSERT_FPGA_DMA7 (1) - -#define CONFIG_HPS_RESET_ASSERT_HPS2FPGA (0) -#define CONFIG_HPS_RESET_ASSERT_LWHPS2FPGA (0) -#define CONFIG_HPS_RESET_ASSERT_FPGA2HPS (0) - -#define CONFIG_HPS_RESET_WARMRST_HANDSHAKE_FPGA (1) -#define CONFIG_HPS_RESET_WARMRST_HANDSHAKE_ETR (1) -#define CONFIG_HPS_RESET_WARMRST_HANDSHAKE_SDRAM (0) - -#endif /* _PRELOADER_RESET_CONFIG_H_ */ - - diff --git a/share/cascade/de10/software/spl_bsp/generated/sdram/sdram_config.h b/share/cascade/de10/software/spl_bsp/generated/sdram/sdram_config.h deleted file mode 100644 index 38662afe..00000000 --- a/share/cascade/de10/software/spl_bsp/generated/sdram/sdram_config.h +++ /dev/null @@ -1,108 +0,0 @@ -/* GENERATED FILE - DO NOT EDIT */ -/* - * Copyright Altera Corporation (C) 2012-2014. All rights reserved - * - * SPDX-License-Identifier: BSD-3-Clause - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Altera Corporation nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ALTERA CORPORATION BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __SDRAM_CONFIG_H -#define __SDRAM_CONFIG_H - -#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE (2) -#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL (8) -#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER (0) -#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN (0) -#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN (0) -#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN (1) -#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT (10) -#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN (0) -#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS (0) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL (7) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL (0) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL (7) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD (3) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW (15) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC (120) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI (3120) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD (6) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP (6) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR (6) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR (4) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP (3) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS (14) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC (20) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD (4) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD (4) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT (512) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT (3) -#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES (0) -#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES (8) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS (10) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS (15) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS (3) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS (1) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH (32) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH (8) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN (0) -#define CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK (3) -#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL (2) -#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA (0) -#define CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH (2) -#define CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN (0) -#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE (0) -#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC (0) -#define CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY (0x3FFD1088) -#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0 (0x21084210) -#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32 (0x1EF84) -#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0 (0x2020) -#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14 (0x0) -#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46 (0xF800) -#define CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0 (0x200) - -#define CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH (0x44555) -#define CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP (0x2C011000) -#define CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP (0xB00088) -#define CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP (0x760210) -#define CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP (0x980543) -#define CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR (0x5A56A) -#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0 (0x20820820) -#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32 (0x8208208) -#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0 (0) -#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4 (0x41041041) -#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36 (0x410410) -#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0 \ -(0x01010101) -#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32 \ -(0x01010101) -#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64 \ -(0x0101) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ (0) -#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE (1) -#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_READ_PORT_USED (0x0) -#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_WRITE_PORT_USED (0x0) -#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_COMMAND_PORT_USED (0x0) -#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST (0x0) - -#endif /*#ifndef__SDRAM_CONFIG_H*/ diff --git a/share/cascade/de10/software/spl_bsp/preloader-mkpimage.bin b/share/cascade/de10/software/spl_bsp/preloader-mkpimage.bin deleted file mode 100644 index ea68d912..00000000 Binary files a/share/cascade/de10/software/spl_bsp/preloader-mkpimage.bin and /dev/null differ diff --git a/share/cascade/de10/software/spl_bsp/preloader.ds b/share/cascade/de10/software/spl_bsp/preloader.ds deleted file mode 100644 index 74aca31e..00000000 --- a/share/cascade/de10/software/spl_bsp/preloader.ds +++ /dev/null @@ -1,47 +0,0 @@ -############################################################ -# -# Copyright Altera 2013 -# All Rights Reserved -# File: preloader.ds -# -############################################################ - -# -# stop processor if running -# -reset system -stop -wait 5s - -set semihosting enabled 0 - -# -# load the preloader (a.k.a the spl from our uboot dist) -# -loadfile "$sdir/uboot-socfpga/spl/u-boot-spl" 0x0 - -# -# set pc to entry point -# -set debug-from *$entrypoint # Set start-at setting to address of $entrypoint -start - -# -# delete any breakpoints -# -delete - -# -# set hw breakpoint in spl in function, spl_boot_device, -# The function, spl_boot_device, is called right before the spl tries -# to load. We stop here so we don't have to change any spl. -# -tbreak spl_boot_device - -# tell target to continue executing spl -cont - -# wait for breakpoint -wait 60s - - diff --git a/share/cascade/de10/software/spl_bsp/settings.bsp b/share/cascade/de10/software/spl_bsp/settings.bsp deleted file mode 100644 index 24f8c1c2..00000000 --- a/share/cascade/de10/software/spl_bsp/settings.bsp +++ /dev/null @@ -1,555 +0,0 @@ - - - spl - default - Oct 12, 2016 10:37:06 AM - 1476239826638 - .\ - E:\SVN\DE10_NANO_SOC\ghrd\software\spl_bsp\settings.bsp - ..\..\hps_isw_handoff\soc_system_hps_0 - default - - 1.9 - - spl.PRELOADER_TGZ - none - UnquotedString - $(SOCEDS_DEST_ROOT)/host_tools/altera/preloader/uboot-socfpga.tar.gz - $(SOCEDS_DEST_ROOT)/host_tools/altera/preloader/uboot-socfpga.tar.gz - public_mk_define - Path to gzip compressed tar archive file which contains Preloader source files. - none - false - common - - - spl.CROSS_COMPILE - none - UnquotedString - arm-altera-eabi- - arm-altera-eabi- - public_mk_define - Target triplet of the cross toolchain to use. - none - false - common - - - spl.reset_assert.L4WD1 - none - Boolean - 0 - 0 - public_mk_define - When enabled, the device will remain in reset state, and registers for this device should not be read. - none - false - - - - spl.reset_assert.OSC1TIMER1 - none - Boolean - 0 - 0 - public_mk_define - When enabled, the device will remain in reset state, and registers for this device should not be read. - none - false - - - - spl.reset_assert.SPTIMER0 - none - Boolean - 0 - 0 - public_mk_define - When enabled, the device will remain in reset state, and registers for this device should not be read. - none - false - - - - spl.reset_assert.SPTIMER1 - none - Boolean - 0 - 0 - public_mk_define - When enabled, the device will remain in reset state, and registers for this device should not be read. - none - false - - - - spl.reset_assert.GPIO0 - none - Boolean - 0 - 0 - public_mk_define - When enabled, the device will remain in reset state, and registers for this device should not be read. - none - false - - - - spl.reset_assert.GPIO1 - none - Boolean - 0 - 0 - public_mk_define - When enabled, the device will remain in reset state, and registers for this device should not be read. - none - false - - - - spl.reset_assert.GPIO2 - none - Boolean - 0 - 0 - public_mk_define - When enabled, the device will remain in reset state, and registers for this device should not be read. - none - false - - - - spl.reset_assert.DMA - none - Boolean - 0 - 0 - public_mk_define - When enabled, the device will remain in reset state, and registers for this device should not be read. - none - false - - - - spl.reset_assert.SDR - none - Boolean - 0 - 0 - public_mk_define - When enabled, the device will remain in reset state, and registers for this device should not be read. - none - false - - - - spl.warm_reset_handshake.FPGA - none - Boolean - 1 - 1 - public_mk_define - When enabled, Reset Manager will perform handshake with FPGA before asserting warm reset. - none - false - - - - spl.warm_reset_handshake.ETR - none - Boolean - 1 - 1 - public_mk_define - When enabled, Reset Manager makes a request to the ETR to stall its AXI master and waits for it to finish any outstanding AXI transactions before a warm reset of the L3 Interconnect or a debug reset of the ETR. This stalling is required because the debug logic (including the ETR) is reset on a debug reset and the ETR AXI master is connected to the L3 Interconnect which is reset on a warm reset and these resets can happen independently. - none - false - - - - spl.warm_reset_handshake.SDRAM - none - Boolean - 0 - 0 - public_mk_define - When enabled, Reset Manager makes a request to the SDRAM controller subsystem to put the SDRAM device into self-refresh mode before asserting warm reset signals. It will ensure the contents of SDRAM devices survive a hardware sequenced warm reset. However, if SDRAM is already in warm reset, handshake with SDRAM is not performed. - none - false - - - - spl.boot.BOOT_FROM_QSPI - none - Boolean - 0 - 0 - public_mk_define - Load subsequent boot image from QSPI. - none - false - common - - - spl.boot.BOOT_FROM_SDMMC - none - Boolean - 1 - 1 - public_mk_define - Load subsequent boot image from SDMMC. - none - false - common - - - spl.boot.BOOT_FROM_NAND - none - Boolean - 0 - 0 - public_mk_define - Load subsequent boot image from NAND. - none - false - common - - - spl.boot.BOOT_FROM_RAM - none - Boolean - 0 - 0 - public_mk_define - Load subsequent boot image from RAM. - none - false - common - - - spl.boot.QSPI_NEXT_BOOT_IMAGE - none - HexNumber - 0x60000 - 0x60000 - public_mk_define - Location of subsequent boot image in QSPI. - none - false - common - - - spl.boot.SDMMC_NEXT_BOOT_IMAGE - none - HexNumber - 0x40000 - 0x40000 - public_mk_define - Location of subsequent boot image in SDMMC. - none - false - common - - - spl.boot.NAND_NEXT_BOOT_IMAGE - none - HexNumber - 0xc0000 - 0xC0000 - public_mk_define - Location of subsequent boot image in NAND. - none - false - common - - - spl.boot.FAT_SUPPORT - none - Boolean - 0 - 0 - public_mk_define - Enable FAT partition support when booting from SDMMC. - none - false - common - - - spl.boot.FAT_BOOT_PARTITION - none - DecimalNumber - 1 - 1 - public_mk_define - When FAT partition support is enabled, this specifies the FAT partition where the boot image is located. - none - false - common - - - spl.boot.FAT_LOAD_PAYLOAD_NAME - none - UnquotedString - u-boot.img - u-boot.img - public_mk_define - When FAT partition supported is enabled, this specifies the boot image filename within a FAT partition to be used as fatload payload. - none - false - common - - - spl.boot.WATCHDOG_ENABLE - none - Boolean - 1 - 1 - public_mk_define - Enable watchdog during Preloader execution phase. Watchdog state remains after Preloader exits. - none - false - - - - spl.debug.DEBUG_MEMORY_WRITE - none - Boolean - 0 - 0 - public_mk_define - Enable debug memory write support for debugging, useful when UART is not available. - none - false - - - - spl.debug.DEBUG_MEMORY_ADDR - none - HexNumber - 0xfffffd00 - 0xFFFFFD00 - public_mk_define - The base address used for storing Preloader debug information. - none - false - - - - spl.debug.DEBUG_MEMORY_SIZE - none - HexNumber - 0x200 - 0x200 - public_mk_define - The amount of memory used for storing Preloader debug information. - none - false - - - - spl.debug.SEMIHOSTING - none - Boolean - 0 - 0 - public_mk_define - Semihosting support in Preloader, to be used together with debugger tool. Useful when UART is not available. - none - false - - - - spl.boot.CHECKSUM_NEXT_IMAGE - none - Boolean - 1 - 1 - public_mk_define - Option to check checksum of subsequent boot image. - none - false - - - - spl.performance.SERIAL_SUPPORT - none - Boolean - 1 - 1 - public_mk_define - Enable UART printout support. - none - false - - - - spl.debug.HARDWARE_DIAGNOSTIC - none - Boolean - 0 - 0 - public_mk_define - Enable hardware diagnostic support. To enable this, at least 1GB of memory is needed, otherwise hardware diagnostic will fail to run properly. - none - false - - - - spl.boot.EXE_ON_FPGA - none - Boolean - 0 - 0 - public_mk_define - Execute Preloader on FPGA. Select this when BootROM is configured as FPGA boot. - none - false - - - - spl.boot.FPGA_MAX_SIZE - none - HexNumber - 0x10000 - 10000 - public_mk_define - The maximum code (.text and .rodata) size that can fit within FPGA. If the actual code size is bigger than the specified size, it will trigger a build error. - none - false - - - - spl.boot.FPGA_DATA_BASE - none - HexNumber - 0xffff0000 - 0xFFFF0000 - public_mk_define - The base address for data region (.data, .bss, malloc and stack) when execute on FPGA is enabled - none - false - - - - spl.boot.FPGA_DATA_MAX_SIZE - none - HexNumber - 0x10000 - 10000 - public_mk_define - The maximum data (.data, .bss, malloc and stack) size that can fit within FPGA. If the actual data size is bigger than the specified size, it will trigger a build error. - none - false - - - - spl.boot.STATE_REG_ENABLE - none - Boolean - 1 - 1 - public_mk_define - Enable write STATE_VALID value to STATE_REG register when Preloader exists. This tells BootROM that the Preloader has run successfully. - none - false - - - - spl.boot.BOOTROM_HANDSHAKE_CFGIO - none - Boolean - 1 - 1 - public_mk_define - Enable handshake with BootROM when configuring the IOCSR and pin mux. When enabled and warm reset happens when the Preloader is still configuring IOCSR and pin mux, BootROM will reconfigure the IOCSR and pin mux again. - none - false - - - - spl.boot.WARMRST_SKIP_CFGIO - none - Boolean - 1 - 1 - public_mk_define - When enabled, Preloader will skip configuring the IOCSR and pin mux when warm reset happens. Only applicable if BootROM has skipped configuring IOCSR and pin mux. - none - false - - - - spl.debug.SKIP_SDRAM - none - Boolean - 0 - 0 - public_mk_define - When enabled, Preloader will skip SDRAM initialization and calibration. - none - false - - - - spl.boot.SDRAM_SCRUBBING - none - Boolean - 0 - 0 - public_mk_define - Scrub SDRAM to initialize the ECC bits - none - false - - - - spl.boot.SDRAM_SCRUB_BOOT_REGION_START - none - HexNumber - 0x1000000 - 0x1000000 - public_mk_define - The start address of the memory region within the SDRAM to be scrubbed. - none - false - - - - spl.boot.SDRAM_SCRUB_BOOT_REGION_END - none - HexNumber - 0x2000000 - 0x2000000 - public_mk_define - The end address of the memory region within SDRAM to be scrubbed. - none - false - - - - spl.boot.SDRAM_SCRUB_REMAIN_REGION - none - Boolean - 1 - 1 - public_mk_define - Scrub the remaining SDRAM memory regions. This will be done during the flash access (to load next boot image). The memory regions are auto calculated. For SOCFPAGA, it would be 2 regions as below: -> CONFIG_SYS_SDRAM_BASE to CONFIG_SPL_SDRAM_SCRUB_BOOT_REGION_START -> CONFIG_SPL_SDRAM_SCRUB_BOOT_REGION_END to calculated SDRAM size - none - false - - - - spl.boot.RAMBOOT_PLLRESET - none - Boolean - 1 - 1 - public_mk_define - Execute RAM boot code after warm reset. This option must be enabled for warm reset to work when CSEL=0, where the RAM boot code will reset PLL settings and put Clock Manager into a state required by BootROM. - none - false - - - \ No newline at end of file diff --git a/share/cascade/de10/software/spl_bsp/u-boot.img b/share/cascade/de10/software/spl_bsp/u-boot.img deleted file mode 100644 index 618caf60..00000000 Binary files a/share/cascade/de10/software/spl_bsp/u-boot.img and /dev/null differ diff --git a/share/cascade/de10/software/spl_bsp/uboot.ds b/share/cascade/de10/software/spl_bsp/uboot.ds deleted file mode 100644 index 8569c278..00000000 --- a/share/cascade/de10/software/spl_bsp/uboot.ds +++ /dev/null @@ -1,55 +0,0 @@ -############################################################ -# -# Copyright Altera 2013 -# All Rights Reserved -# File: uboot.ds -# -############################################################ - -# -# This is an ARM DS5 debugger script that is intended to help folks run and -# debug uboot. It loads the preloader (a.k.a. spl) into onchip ram, runs it -# to setup DDR, then loads uboot, lets uboot run a bit to calculate relocation -# offset, and finally reloads symbol table with calculated offset in the -# relocated code. -# - -# -# load and run the preloader -# -source -v "$sdir/preloader.ds" - -# if trace is enabled and you have self-modifying code, -# you'll want to turn this off. u-boot is self-modifying -set trust-ro-sections-for-opcodes off - -# -# now load unrelocated uboot into ddr -# -loadfile "$sdir/uboot-socfpga/u-boot" - -# set pc to start of uboot -start - -# -# set breakpoint at start of code that relocates uboot -tbreak relocate_code -cont -wait 60s - -# -# -# now reload the symbol table with runtime calculated relocation offset. -# register r8 is uboot's "global data" pointer. -# -symbol-file "$sdir/uboot-socfpga/u-boot" ((gd_t*)$r8)->reloc_off - -# -# Now set a break in the board_init_r (from uboot). It must be a hardware -# breakpoint because this is after relocation. -# -thbreak board_init_r -cont -wait 60s - - diff --git a/share/cascade/image/de10/data/boot.script b/share/cascade/image/de10/data/boot.script new file mode 100644 index 00000000..e2d15064 --- /dev/null +++ b/share/cascade/image/de10/data/boot.script @@ -0,0 +1,13 @@ +echo -- Programming FPGA -- +fatload mmc 0:1 $fpgadata soc_system.rbf; +fpga load 0 $fpgadata $filesize; +run bridge_enable_handoff; + +echo -- Setting Env Variables -- +setenv fdtimage soc_system.dtb; +setenv mmcroot /dev/mmcblk0p2; +setenv mmcload 'mmc rescan;${mmcloadcmd} mmc 0:${mmcloadpart} ${loadaddr} ${bootimage};${mmcloadcmd} mmc 0:${mmcloadpart} ${fdtaddr} ${fdtimage};'; +setenv mmcboot 'setenv bootargs console=ttyS0,115200 root=${mmcroot} rw rootwait; bootz ${loadaddr} - ${fdtaddr}'; + +run mmcload; +run mmcboot; diff --git a/share/cascade/image/de10/data/fstab b/share/cascade/image/de10/data/fstab new file mode 100644 index 00000000..1d409b9f --- /dev/null +++ b/share/cascade/image/de10/data/fstab @@ -0,0 +1 @@ +/dev/mmcblk0p2 / ext4 relatime,errors=remount-ro 0 1 diff --git a/share/cascade/image/de10/data/interfaces b/share/cascade/image/de10/data/interfaces new file mode 100644 index 00000000..5f449785 --- /dev/null +++ b/share/cascade/image/de10/data/interfaces @@ -0,0 +1,11 @@ +auto lo +iface lo inet loopback + +allow-hotplug eth0 +iface eth0 inet dhcp + +auto usb0 +iface usb0 inet static + address 192.168.7.5 + netmask 255.255.255.0 + network 192.168.7.0 diff --git a/share/cascade/image/de10/data/preloader-mkpimage.bin b/share/cascade/image/de10/data/preloader-mkpimage.bin new file mode 100644 index 00000000..773c702a Binary files /dev/null and b/share/cascade/image/de10/data/preloader-mkpimage.bin differ diff --git a/share/cascade/image/de10/data/soc_system.dtb b/share/cascade/image/de10/data/soc_system.dtb new file mode 100644 index 00000000..fa381e35 Binary files /dev/null and b/share/cascade/image/de10/data/soc_system.dtb differ diff --git a/share/cascade/image/de10/data/soc_system.rbf b/share/cascade/image/de10/data/soc_system.rbf new file mode 100644 index 00000000..c9fc20c2 Binary files /dev/null and b/share/cascade/image/de10/data/soc_system.rbf differ diff --git a/share/cascade/image/de10/data/u-boot.img b/share/cascade/image/de10/data/u-boot.img new file mode 100644 index 00000000..fc978950 Binary files /dev/null and b/share/cascade/image/de10/data/u-boot.img differ diff --git a/share/cascade/image/de10/data/u-boot.scr b/share/cascade/image/de10/data/u-boot.scr new file mode 100644 index 00000000..afc04302 Binary files /dev/null and b/share/cascade/image/de10/data/u-boot.scr differ diff --git a/share/cascade/image/de10/data/zImage b/share/cascade/image/de10/data/zImage new file mode 100755 index 00000000..096fd00e Binary files /dev/null and b/share/cascade/image/de10/data/zImage differ diff --git a/share/cascade/image/de10/hw.sh b/share/cascade/image/de10/hw.sh new file mode 100755 index 00000000..f2d00091 --- /dev/null +++ b/share/cascade/image/de10/hw.sh @@ -0,0 +1,95 @@ +#!/bin/sh + +# This script compiles the hardware side of the de10 image: +# 1. The default bitstream data/soc_system.rbf +# 2. The preloader data/preloader-mkpimage.bin +# 3. The device tree data/soc_system.dtb + +# Because this script is both memory and time-consuming (the quartus +# SDE requires several gigabytes of installation space) and the results +# are modestly sized O(2MB), we've added these files to the repository. +# In general, it should not be necessary to run this script. + +# Constant Defintiions + +export QMAJ=17.1 +export QMIN=590 +export QUARTUS=${HOME}/intelFPGA_lite/${QMAJ}/quartus + +# Install apt dependencies + +sudo apt-get update +sudo apt-get install bison flex libc6-i386 make wget + +# Create download directory if it doesn't already exist + +if [ ! -d download ]; then + mkdir -p download +fi + +# Download tar files and installers + +if [ ! -f download/Quartus-lite-${QMAJ}.0.${QMIN}-linux.tar ]; then + cd download + wget http://download.altera.com/akdlm/software/acdsinst/${QMAJ}std/${QMIN}/ib_tar/Quartus-lite-${QMAJ}.0.${QMIN}-linux.tar + wget http://download.altera.com/akdlm/software/acdsinst/${QMAJ}std/${QMIN}/ib_installers/SoCEDSSetup-${QMAJ}.0.${QMIN}-linux.run + chmod 775 SoCEDSSetup-${QMAJ}.0.${QMIN}-linux.run + cd .. +fi + +# Install quartus tools +# - Accept license terms +# - Uncheck all but base quartus tools and cyclone V tools +# - Install SoCEDS tools to same directory as quartus tools (add _lite) +# TODO: +# - The SoCEDS install script will hang if this script runs it after quartus installation +# - Regardless of how I've tried running it, it seems to hang on success +# - Running embedded_command_shell.sh will cause this script to exit early when it finishes + +if [ ! -d quartus ]; then + mkdir -p quartus + tar -xf download/Quartus-lite-${QMAJ}.0.${QMIN}-linux.tar -C quartus + quartus/setup.sh + download/SoCEDSSetup-${QMAJ}.0.${QMIN}-linux.run + cd ${HOME}/intelFPGA_lite/${QMAJ}/embedded + ./embedded_command_shell.sh + cd - +fi + +# Create the de10 directory if it doesn't already exist + +if [ ! -d de10 ]; then + cp -R ../../de10 . +fi + +# Compile default bitstream to rbf +if [ ! -f data/soc_system.rbf ]; then + cd de10 + ${QUARTUS}/sopc_builder/bin/qsys-generate soc_system.qsys --synthesis=VERILOG + ${QUARTUS}/bin/quartus_map DE10_NANO_SoC_GHRD.qpf + ${QUARTUS}/bin/quartus_fit DE10_NANO_SoC_GHRD.qpf + ${QUARTUS}/bin/quartus_asm DE10_NANO_SoC_GHRD.qpf + ${QUARTUS}/bin/quartus_cpf -c sof2rbf.cof + mv output_files/DE10_NANO_SoC_GHRD.rbf ../data + cd .. +fi + +# Compile pre-loader +# - File -> New HPS BSP +# - Select DE10_NANO_SoC_GHRD/hps_isw_handoff/soc_system_hps_0 in ... menu +# - ok +# - check FAT SUPPORT +# - generate +# TODO: +# - Running bsp-editor will shut this script down early + +if [ ! -f data/preloader-mkpimage.bin ]; then + cd de10 + bsp-editor& + cd software/spl_bsp + make + mv preloader-mkpimage.bin ../../../data + cd ../../.. +fi + +# TODO: Generate device tree diff --git a/share/cascade/image/de10/image.sh b/share/cascade/image/de10/image.sh new file mode 100755 index 00000000..21f27d5b --- /dev/null +++ b/share/cascade/image/de10/image.sh @@ -0,0 +1,94 @@ +#!/bin/sh + +# Constant Defintiions + +export SDCARD=/dev/sdb +export SIZE=4G +export SIZE_MINUS=4054M + +# Install apt dependencies + +sudo apt-get update +sudo apt-get install bison flex libc6-i386 make wget qemu-user-static + +# Create download directory if it doesn't already exist + +if [ ! -d download ]; then + mkdir -p download +fi + +# Download tar files and installers + +if [ ! -f download/ubuntu.tar.gz ]; then + cd download + wget http://cdimage.ubuntu.com/ubuntu-base/releases/18.04.2/release/ubuntu-base-18.04.2-base-armhf.tar.gz -O ubuntu.tar.gz + cd .. +fi + +# Copy root file system + +if [ ! -d rootfs ]; then + mkdir rootfs + sudo tar -xf download/ubuntu.tar.gz -C rootfs + sudo cp /usr/bin/qemu-arm-static rootfs/usr/bin/ + + sudo ./runc rootfs apt-get update + + sudo ./runc rootfs apt-get --reinstall install -y rsyslog + sudo ./runc rootfs apt-get install -y openssh-server net-tools ifupdown + sudo ./runc rootfs apt-get install -y sudo udev vim + sudo ./runc rootfs apt-get install -y ntp ntpdate + sudo ./runc rootfs apt-get install -y make + + sudo ./runc rootfs useradd -m -s /bin/bash fpga + sudo ./runc rootfs passwd fpga + sudo ./runc rootfs usermod -aG sudo fpga + + sudo cp data/fstab rootfs/etc/ + sudo cp data/interfaces rootfs/etc/network/ + + # Running this here doesn't seem to fix the date, try running by hand + # sudo ./runc rootfs ntpdate -u pool.ntp.org + # This doesn't seem to work here, try running by hand + # sudo ./runc rootfs echo 'y' | /usr/local/sbin/unminimize +fi + +# Write Image + +sudo dd if=/dev/zero of=sdcard.img bs=1 count=0 seek=${SIZE} +export LOOPBACK=`sudo losetup --show -f sdcard.img` + +sudo sfdisk ${LOOPBACK} -uS << EOF +,32M,b +,${SIZE_MINUS},83 +,10M,A2 +EOF +sudo partprobe ${LOOPBACK} + +sudo dd if=data/preloader-mkpimage.bin of=${LOOPBACK}p3 bs=64k seek=0 + +sudo mkfs -t vfat ${LOOPBACK}p1 +mkdir fat_mount +sudo mount ${LOOPBACK}p1 fat_mount/ +sudo cp data/u-boot.img data/u-boot.scr data/soc_system.dtb data/soc_system.rbf data/zImage fat_mount/ +sync +sudo umount fat_mount +rmdir fat_mount + +sudo mkfs.ext4 ${LOOPBACK}p2 +mkdir ext_mount +sudo mount ${LOOPBACK}p2 ext_mount/ +sudo rsync -axHAXW --progress rootfs/* ext_mount +sync +sudo umount ext_mount +rmdir ext_mount + +sudo dd if=sdcard.img of=${SDCARD} bs=4M status=progress +sync + +# Cleanup + +sudo rm -f sdcard.img +sudo losetup -d $LOOPBACK +sudo rm -rf download +sudo rm -rf rootfs diff --git a/share/cascade/image/de10/runc b/share/cascade/image/de10/runc new file mode 100755 index 00000000..d66877b8 --- /dev/null +++ b/share/cascade/image/de10/runc @@ -0,0 +1,83 @@ +#! /bin/bash + +# -- Help text. + +HELP=\ +"Usage: runc [options] [command arguments] +Options: + -h, --help Print this help. +runc is a tool for running commands inside a chroot environment. +" +# -- Helper functions. + +error () { + printf "runc: $@\n" >& 2 + exit 1 +} + +clean () { + + # -- Clean the system mountpoints. + + for d in $CHROOT_DIR/*; do + + mountpoint -q $d && + umount -f $d + + done + +} + +# -- Handle the arguments. + +case $1 in + + -h|--help) + + printf "$HELP" + exit 0 + + ;; + +esac + +[ $# -lt 2 ] && + error "Too few arguments." + +[ -d $1 ] && { + CHROOT_DIR=$1 + shift +} || { + error "'$1' is not a directory." +} + +# -- Clean the chroot directory on exit. + +trap clean EXIT HUP INT TERM + +# -- Create the essential mountpoints for the chroot. + +mount -o bind /dev $CHROOT_DIR/dev +mount -o bind /dev/pts $CHROOT_DIR/dev/pts +mount -o bind /proc $CHROOT_DIR/proc +mount -o bind /sys $CHROOT_DIR/sys + +# -- Allow network access. + +[ -f /etc/resolv.conf ] && + cp $(readlink -f /etc/resolv.conf) $CHROOT_DIR/etc/resolv.conf + +# -- Run the command in the chroot. + +if [ -f $1 -a -x $1 ]; then + cp $1 $CHROOT_DIR/ + chroot $CHROOT_DIR /$@ + rm -r $CHROOT_DIR/$1 +else + chroot $CHROOT_DIR $@ +fi + +umount $CHROOT_DIR/dev/pts +umount $CHROOT_DIR/dev +umount $CHROOT_DIR/proc +umount $CHROOT_DIR/sys diff --git a/share/cascade/image/de10/sw.sh b/share/cascade/image/de10/sw.sh new file mode 100755 index 00000000..21fc3946 --- /dev/null +++ b/share/cascade/image/de10/sw.sh @@ -0,0 +1,84 @@ +#!/bin/sh + +# This script compiles the software side of the de10 image: +# 1. The u-boot boot image data/u-boot.img +# 2. The u-boot boot script data/u-boot.scr +# 3. The linux kernel data/zImage + +# Because this script is both memory and time-consuming and the results +# are modestly sized O(4MB), we've added these files to the repository. +# In general, it should not be necessary to run this script. + +# Install apt dependencies + +sudo apt-get update +sudo apt-get install bison flex libc6-i386 make wget + +# Create download directory if it doesn't already exist + +if [ ! -d download ]; then + mkdir -p download +fi + +# Download tar files and installers + +if [ ! -f download/gcc-linaro-6.3.1-2017.05-x86_64_arm-linux-gnueabihf.tar.xz ]; then + cd download + wget https://releases.linaro.org/components/toolchain/binaries/6.3-2017.05/arm-linux-gnueabihf/gcc-linaro-6.3.1-2017.05-x86_64_arm-linux-gnueabihf.tar.xz + cd .. +fi + +# Install cross-compiler +# NOTE: +# - This isn't the URL provided in the tutorial, but it points to the same version + +if [ ! -d cc ]; then + mkdir -p cc + tar xf download/gcc-linaro-6.3.1-2017.05-x86_64_arm-linux-gnueabihf.tar.xz -C cc +fi +export CROSS_COMPILE=$PWD/cc/gcc-linaro-6.3.1-2017.05-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf- + +# Create the de10 directory if it doesn't already exist + +if [ ! -d de10/software ]; then + cp -R ../../de10 . + mkdir -p de10/software +fi + +# Build u-boot + +if [ ! -f data/u-boot.img ]; then + cd de10/software + git clone https://github.com/altera-opensource/u-boot-socfpga.git + cd u-boot-socfpga + git checkout rel_socfpga_v2013.01.01_17.08.01_pr + make mrproper + make socfpga_cyclone5_config + make + cp u-boot.img ../../../data + cd ../../.. +fi + +# Generate u-boot script + +if [ ! -f data/u-boot.scr ]; then + cp data/boot.script de10/software + cd de10/software + mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "Boot Script Name" -d boot.script u-boot.scr + mv u-boot.scr ../../data + cd - +fi + +# Copy linux source code +# See here for menu options: +# https://tewarid.github.io/2012/05/02/enable-support-for-rndis-ethernet-devices-in-the-linux-kernel.html + +if [ ! -d de10/software/kernel ]; then + git clone git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git --depth=1 --branch v5.2 de10/software/kernel + cd de10/software/kernel + ARCH=arm make socfpga_defconfig + ARCH=arm make menuconfig + ARCH=arm make zImage + cp arch/arm/boot/zImage ../../../data + cd - +fi diff --git a/share/cascade/test/regression/simple/hex.v b/share/cascade/test/regression/simple/hex.v new file mode 100644 index 00000000..e8ba3637 --- /dev/null +++ b/share/cascade/test/regression/simple/hex.v @@ -0,0 +1,7 @@ +wire [15:0] x = 16'hDEAD; +wire [15:0] y = 16'hdead; +initial begin + $display("%h", x); + $display("%h", y); + $finish; +end diff --git a/src/cascade/common/bits.h b/src/cascade/common/bits.h index afc64ef8..0a759124 100644 --- a/src/cascade/common/bits.h +++ b/src/cascade/common/bits.h @@ -1435,7 +1435,7 @@ inline void BitsBase::read_2_8_16(std::istream& is, size_t base) { size_t idx = 0; for (int i = s.length()-1; i >= 0; --i) { // Convert character to bits - const T bits = static_cast(isalpha(s[i])) ? ((s[i]-'a')+10) : (s[i]-'0'); + const T bits = static_cast(isalpha(s[i])) ? ((tolower(s[i])-'a')+10) : (s[i]-'0'); // Copy bits into storage and bump idx. val_[word] |= (bits << idx); idx += step; diff --git a/test/regression/simple.cc b/test/regression/simple.cc index d33fe043..a4927357 100644 --- a/test/regression/simple.cc +++ b/test/regression/simple.cc @@ -165,6 +165,9 @@ TEST(simple, hello_2) { TEST(simple, hello_3) { run_code("regression/minimal","share/cascade/test/regression/simple/hello_3.v", "Hello World"); } +TEST(simple, hex) { + run_code("regression/minimal","share/cascade/test/regression/simple/hex.v", "dead\ndead\n"); +} TEST(simple, ifdef_1) { run_code("regression/minimal","share/cascade/test/regression/simple/ifdef_1.v", "1234567"); }