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system(U5): update STM32U5xx CMSIS Drivers to v1.4.1
Included in STM32CubeU5 FW v1.7.0 Signed-off-by: Frederic Pillon <[email protected]>
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15 files changed

+2427
-1265
lines changed

15 files changed

+2427
-1265
lines changed

‎system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/stm32u535xx.h‎

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -216,7 +216,7 @@ typedef enum
216216

217217
/** @} */ /* End of group Configuration_of_CMSIS */
218218

219-
#include <core_cm33.h> /*!< ARM Cortex-M33 processor and core peripherals */
219+
#include "core_cm33.h" /*!< ARM Cortex-M33 processor and core peripherals */
220220
#include "system_stm32u5xx.h" /*!< STM32U5xx System */
221221

222222

@@ -4796,6 +4796,9 @@ typedef struct
47964796
#define RNG_HTCR_HTCFG_Pos (0U)
47974797
#define RNG_HTCR_HTCFG_Msk (0xFFFFFFFFUL << RNG_HTCR_HTCFG_Pos) /*!< 0xFFFFFFFF */
47984798
#define RNG_HTCR_HTCFG RNG_HTCR_HTCFG_Msk
4799+
/******************** RNG Nist Compliance Values *******************/
4800+
#define RNG_CR_NIST_VALUE (0x00F00D00U)
4801+
#define RNG_HTCR_NIST_VALUE (0xAAC7U)
47994802

48004803
/******************************************************************************/
48014804
/* */
@@ -16168,7 +16171,7 @@ typedef struct
1616816171
#define TAMP_CR3_ITAMP6NOER_Msk (0x1UL << TAMP_CR3_ITAMP6NOER_Pos) /*!< 0x00000020 */
1616916172
#define TAMP_CR3_ITAMP6NOER TAMP_CR3_ITAMP6NOER_Msk
1617016173
#define TAMP_CR3_ITAMP7NOER_Pos (6U)
16171-
#define TAMP_CR3_ITAMP7NOER_Msk (0x1UL << TAMP_CR3_ITAMP7NOER)
16174+
#define TAMP_CR3_ITAMP7NOER_Msk (0x1UL << TAMP_CR3_ITAMP7NOER_Pos)
1617216175
#define TAMP_CR3_ITAMP7NOER TAMP_CR3_ITAMP7NOER_Msk
1617316176
#define TAMP_CR3_ITAMP8NOER_Pos (7U)
1617416177
#define TAMP_CR3_ITAMP8NOER_Msk (0x1UL << TAMP_CR3_ITAMP8NOER_Pos) /*!< 0x00000040 */
@@ -20293,7 +20296,7 @@ typedef struct
2029320296
#define VREFBUF_CSR_VRS VREFBUF_CSR_VRS_Msk /*!<Voltage reference scale */
2029420297
#define VREFBUF_CSR_VRS_0 (0x01UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x000O0010 */
2029520298
#define VREFBUF_CSR_VRS_1 (0x02UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000020 */
20296-
#define VREFBUF_CSR_VRS_2 (0x04UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000030 */
20299+
#define VREFBUF_CSR_VRS_2 (0x04UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000040 */
2029720300
#define VREFBUF_CSR_VRR_Pos (3U)
2029820301
#define VREFBUF_CSR_VRR_Msk (0x1UL << VREFBUF_CSR_VRR_Pos) /*!< 0x00000008 */
2029920302
#define VREFBUF_CSR_VRR VREFBUF_CSR_VRR_Msk /*!<Voltage reference buffer ready */

‎system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/stm32u545xx.h‎

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -220,7 +220,7 @@ typedef enum
220220

221221
/** @} */ /* End of group Configuration_of_CMSIS */
222222

223-
#include <core_cm33.h> /*!< ARM Cortex-M33 processor and core peripherals */
223+
#include "core_cm33.h" /*!< ARM Cortex-M33 processor and core peripherals */
224224
#include "system_stm32u5xx.h" /*!< STM32U5xx System */
225225

226226

@@ -4960,6 +4960,9 @@ typedef struct
49604960
#define RNG_HTCR_HTCFG_Pos (0U)
49614961
#define RNG_HTCR_HTCFG_Msk (0xFFFFFFFFUL << RNG_HTCR_HTCFG_Pos) /*!< 0xFFFFFFFF */
49624962
#define RNG_HTCR_HTCFG RNG_HTCR_HTCFG_Msk
4963+
/******************** RNG Nist Compliance Values *******************/
4964+
#define RNG_CR_NIST_VALUE (0x00F00D00U)
4965+
#define RNG_HTCR_NIST_VALUE (0xAAC7U)
49634966

49644967
/******************************************************************************/
49654968
/* */
@@ -16720,7 +16723,7 @@ typedef struct
1672016723
#define TAMP_CR3_ITAMP6NOER_Msk (0x1UL << TAMP_CR3_ITAMP6NOER_Pos) /*!< 0x00000020 */
1672116724
#define TAMP_CR3_ITAMP6NOER TAMP_CR3_ITAMP6NOER_Msk
1672216725
#define TAMP_CR3_ITAMP7NOER_Pos (6U)
16723-
#define TAMP_CR3_ITAMP7NOER_Msk (0x1UL << TAMP_CR3_ITAMP7NOER)
16726+
#define TAMP_CR3_ITAMP7NOER_Msk (0x1UL << TAMP_CR3_ITAMP7NOER_Pos)
1672416727
#define TAMP_CR3_ITAMP7NOER TAMP_CR3_ITAMP7NOER_Msk
1672516728
#define TAMP_CR3_ITAMP8NOER_Pos (7U)
1672616729
#define TAMP_CR3_ITAMP8NOER_Msk (0x1UL << TAMP_CR3_ITAMP8NOER_Pos) /*!< 0x00000040 */
@@ -20889,7 +20892,7 @@ typedef struct
2088920892
#define VREFBUF_CSR_VRS VREFBUF_CSR_VRS_Msk /*!<Voltage reference scale */
2089020893
#define VREFBUF_CSR_VRS_0 (0x01UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x000O0010 */
2089120894
#define VREFBUF_CSR_VRS_1 (0x02UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000020 */
20892-
#define VREFBUF_CSR_VRS_2 (0x04UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000030 */
20895+
#define VREFBUF_CSR_VRS_2 (0x04UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000040 */
2089320896
#define VREFBUF_CSR_VRR_Pos (3U)
2089420897
#define VREFBUF_CSR_VRR_Msk (0x1UL << VREFBUF_CSR_VRR_Pos) /*!< 0x00000008 */
2089520898
#define VREFBUF_CSR_VRR VREFBUF_CSR_VRR_Msk /*!<Voltage reference buffer ready */

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