system(U0): update STM32U0xx CMSIS Drivers to v1.2.0

Included in STM32CubeU0 FW v1.2.0

Signed-off-by: Frederic Pillon <[email protected]>

Author: fpistm

system/Drivers/CMSIS/Device/ST/STM32U0xx/Include/stm32u031xx.h

@@ -706,6 +706,10 @@ typedef struct
 #define UID_BASE              (0x1FFF3E50UL)        /*!< Unique device ID register base address */
 #define FLASHSIZE_BASE        (0x1FFF3EA0UL)        /*!< Flash size data register base address  */
 
+/*!< Bootloader Firmware */
+/************ Bootloader Exit Secure Memory Firmware *************/
+#define BL_EXIT_SEC_MEM_BASE    (0x1FFF3500UL)
+
 /**
   * @}
   */

system/Drivers/CMSIS/Device/ST/STM32U0xx/Include/stm32u073xx.h

@@ -775,6 +775,10 @@ typedef struct
 #define UID_BASE              (0x1FFF6E50UL)        /*!< Unique device ID register base address */
 #define FLASHSIZE_BASE        (0x1FFF6EA0UL)        /*!< Flash size data register base address  */
 
+/*!< Bootloader Firmware */
+/************ Bootloader Exit Secure Memory Firmware *************/
+#define BL_EXIT_SEC_MEM_BASE    (0x1FFF6000UL)
+
 /**
   * @}
   */

system/Drivers/CMSIS/Device/ST/STM32U0xx/Include/stm32u083xx.h

@@ -809,6 +809,10 @@ typedef struct
 #define UID_BASE              (0x1FFF6E50UL)        /*!< Unique device ID register base address */
 #define FLASHSIZE_BASE        (0x1FFF6EA0UL)        /*!< Flash size data register base address  */
 
+/*!< Bootloader Firmware */
+/************ Bootloader Exit Secure Memory Firmware *************/
+#define BL_EXIT_SEC_MEM_BASE    (0x1FFF6000UL)
+
 /**
   * @}
   */

system/Drivers/CMSIS/Device/ST/STM32U0xx/Include/stm32u0xx.h

@@ -8,8 +8,8 @@
   *          is using in the C source code, usually in main.c. This file contains:
   *           - Configuration section that allows to select:
   *              - The STM32U0xx device used in the target application
-  *              - To use or not the peripheral’s drivers in application code(i.e.
-  *                code will be based on direct access to peripheral’s registers
+  *              - To use or not the peripheral's drivers in application code(i.e.
+  *                code will be based on direct access to peripheral's registers
   *                rather than drivers API), this option is controlled by
   *                "#define USE_HAL_DRIVER"
   *
@@ -76,10 +76,10 @@
 #endif /* USE_HAL_DRIVER */
 
 /**
-  * @brief CMSIS Device version number 1.0.0
+  * @brief CMSIS Device version number 1.2.0
   */
 #define __STM32U0_CMSIS_VERSION_MAIN   (0x01) /*!< [31:24] main version */
-#define __STM32U0_CMSIS_VERSION_SUB1   (0x00) /*!< [23:16] sub1 version */
+#define __STM32U0_CMSIS_VERSION_SUB1   (0x02) /*!< [23:16] sub1 version */
 #define __STM32U0_CMSIS_VERSION_SUB2   (0x00) /*!< [15:8]  sub2 version */
 #define __STM32U0_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */
 #define __STM32U0_CMSIS_VERSION        ((__STM32U0_CMSIS_VERSION_MAIN     << 24)\
@@ -127,8 +127,8 @@ typedef enum
 
 typedef enum
 {
-  ERROR = 0,
-  SUCCESS = !ERROR
+  SUCCESS = 0,
+  ERROR = !SUCCESS
 } ErrorStatus;
 
 /**

system/Drivers/CMSIS/Device/ST/STM32U0xx/Release_Notes.html

@@ -30,27 +30,42 @@ <h1 id="release-notes-for-stm32u0xx-cmsis">Release Notes for <mark> STM32U0xx C
 <div class="col-sm-12 col-lg-8">
 <h1 id="update-history"><strong>Update History</strong></h1>
 <div class="collapse">
-<input type="checkbox" id="collapse-section2" checked aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.1.0 / 05-June-2024</strong></label>
+<input type="checkbox" id="collapse-section3" checked aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"><strong>V1.2.0 / 30-October-2024</strong></label>
 <div>
 <h2 id="main-changes">Main Changes</h2>
 <ul>
 <li><strong>CMSIS Device</strong> Maintenance Release version of bits and registers definition aligned with the <strong>RM0503</strong> (STM32U0 reference manual).
 <ul>
+<li>Fixed the right CFGR_HPRE shift in the SystemCoreClockUpdate API.</li>
+<li>Align the ErrorStatus typedef declaration with HAL_StatusTypeDef.</li>
+<li>Add the address to use for the bootloader jump service.</li>
+</ul></li>
+</ul>
+<h1 id="section"></h1>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.1.0 / 05-June-2024</strong></label>
+<div>
+<h2 id="main-changes-1">Main Changes</h2>
+<ul>
+<li><strong>CMSIS Device</strong> Maintenance Release version of bits and registers definition aligned with the <strong>RM0503</strong> (STM32U0 reference manual).
+<ul>
 <li>Add I2C_CR1_SBC bit definition.</li>
 <li>Removed the I2C_CR1_SWRST bit definition.</li>
 </ul></li>
 </ul>
-<h1 id="section"></h1>
+<h1 id="section-1"></h1>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section1" ria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 12-February-2024</strong></label>
 <div>
-<h2 id="main-changes-1">Main Changes</h2>
+<h2 id="main-changes-2">Main Changes</h2>
 <ul>
 <li>First official release version of bits and registers definition aligned with the <strong>RM0503</strong> (STM32U0 reference manual).</li>
 </ul>
-<h1 id="section-1"></h1>
+<h1 id="section-2"></h1>
 </div>
 </div>
 </div>

system/Drivers/CMSIS/Device/ST/STM32U0xx/Source/Templates/system_stm32u0xx.c

@@ -327,7 +327,7 @@ void SystemCoreClockUpdate(void)
   }
   /* Compute HCLK clock frequency --------------------------------------------*/
   /* Get HCLK prescaler */
-  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U) & 0xFU];
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos) & 0xFU];
   /* HCLK clock frequency */
   SystemCoreClock >>= tmp;
 }

system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md

@@ -16,7 +16,7 @@
   * STM32L4: 1.7.4
   * STM32L5: 1.0.6
   * STM32MP1: 1.6.0
-  * STM32U0: 1.0.0
+  * STM32U0: 1.2.0
   * STM32U5: 1.4.0
   * STM32WB: 1.12.2
   * STM32WBA: 1.4.0