diff --git a/components/retro-go/config.h b/components/retro-go/config.h index bd8ad3673..c9a09f341 100644 --- a/components/retro-go/config.h +++ b/components/retro-go/config.h @@ -12,6 +12,8 @@ #include "targets/esplay-micro/config.h" #elif defined(RG_TARGET_FRI3D_2024) #include "targets/fri3d-2024/config.h" +#elif defined(RG_TARGET_GB300_P4) +#include "targets/gb300-p4/config.h" #elif defined(RG_TARGET_MRGC_G32) #include "targets/mrgc-g32/config.h" #elif defined(RG_TARGET_MRGC_GBM) diff --git a/components/retro-go/targets/crokpocket/config.h b/components/retro-go/targets/crokpocket/config.h index da1dd5856..21c6fad35 100644 --- a/components/retro-go/targets/crokpocket/config.h +++ b/components/retro-go/targets/crokpocket/config.h @@ -1,22 +1,61 @@ -// Target definition +/**************************************************************************** + * Target definition for CrokPocket by Megazoid * + * Info: www.instructables.com/CrokPocket/ * + ****************************************************************************/ #define RG_TARGET_NAME "CROKPOCKET" -// Storage + +/**************************************************************************** + * Status LED * + ****************************************************************************/ +#define RG_LED_DRIVER 1 // 1 = GPIO +#define RG_GPIO_LED GPIO_NUM_38 +// #define RG_GPIO_LED_INVERT // Uncomment if the LED is active LOW + + +/**************************************************************************** + * I2C / GPIO Extender * + ****************************************************************************/ +// #define RG_I2C_GPIO_DRIVER 0 // 1 = AW9523, 2 = PCF9539, 3 = MCP23017, 4 = PCF8575, 5 = PCF8574 +// #define RG_I2C_GPIO_ADDR 0x00 +// #define RG_GPIO_I2C_SDA GPIO_NUM_NC +// #define RG_GPIO_I2C_SCL GPIO_NUM_NC + + +/**************************************************************************** + * Storage * + ****************************************************************************/ #define RG_STORAGE_ROOT "/sd" #define RG_STORAGE_SDSPI_HOST SPI3_HOST #define RG_STORAGE_SDSPI_SPEED SDMMC_FREQ_DEFAULT +#define RG_GPIO_SDSPI_MISO GPIO_NUM_9 +#define RG_GPIO_SDSPI_MOSI GPIO_NUM_11 +#define RG_GPIO_SDSPI_CLK GPIO_NUM_13 +#define RG_GPIO_SDSPI_CS GPIO_NUM_10 // #define RG_STORAGE_SDMMC_HOST SDMMC_HOST_SLOT_1 // #define RG_STORAGE_SDMMC_SPEED SDMMC_FREQ_DEFAULT // #define RG_STORAGE_FLASH_PARTITION "vfs" -// Audio + +/**************************************************************************** + * Audio * + ****************************************************************************/ #define RG_AUDIO_USE_INT_DAC 0 // 0 = Disable, 1 = GPIO25, 2 = GPIO26, 3 = Both #define RG_AUDIO_USE_EXT_DAC 1 // 0 = Disable, 1 = Enable +#define RG_AUDIO_USE_BUZZER_PIN 0 // See drivers/audio/buzzer.c for details +#define RG_GPIO_SND_I2S_BCK GPIO_NUM_41 +#define RG_GPIO_SND_I2S_WS GPIO_NUM_42 +#define RG_GPIO_SND_I2S_DATA GPIO_NUM_40 +#define RG_GPIO_SND_AMP_ENABLE GPIO_NUM_21 +// #define RG_GPIO_SND_AMP_ENABLE_INVERT // Uncomment if the mute = HIGH + -// Video -#define RG_SCREEN_DRIVER 0 // 0 = ILI9341 +/**************************************************************************** + * Video * + ****************************************************************************/ +#define RG_SCREEN_DRIVER 0 // 0 = ILI9341/ST7789 #define RG_SCREEN_HOST SPI2_HOST -#define RG_SCREEN_SPEED SPI_MASTER_FREQ_40M // SPI_MASTER_FREQ_80M +#define RG_SCREEN_SPEED SPI_MASTER_FREQ_40M #define RG_SCREEN_BACKLIGHT 1 #define RG_SCREEN_WIDTH 320 #define RG_SCREEN_HEIGHT 240 @@ -25,27 +64,33 @@ #define RG_SCREEN_PIXEL_FORMAT 0 // Possible values are 0=565_BE, 1=565_LE #define RG_SCREEN_VISIBLE_AREA {0, 0, 0, 0} // Left, Top, Right, Bottom #define RG_SCREEN_SAFE_AREA {0, 0, 0, 0} // Left, Top, Right, Bottom - #define RG_SCREEN_INIT() \ - ILI9341_CMD(0xCF, 0x00, 0xc3, 0x30); \ - ILI9341_CMD(0xED, 0x64, 0x03, 0x12, 0x81); \ - ILI9341_CMD(0xE8, 0x85, 0x00, 0x78); \ - ILI9341_CMD(0xCB, 0x39, 0x2c, 0x00, 0x34, 0x02); \ - ILI9341_CMD(0xF7, 0x20); \ - ILI9341_CMD(0xEA, 0x00, 0x00); \ ILI9341_CMD(0xC0, 0x1B); /* Power control //VRH[5:0] */ \ ILI9341_CMD(0xC1, 0x12); /* Power control //SAP[2:0];BT[3:0] */ \ ILI9341_CMD(0xC5, 0x32, 0x3C); /* VCM control */ \ ILI9341_CMD(0xC7, 0x91); /* VCM control2 */ \ - ILI9341_CMD(0xB1, 0x00, 0x10); /* Frame Rate Control (1B=70, 1F=61, 10=119) */ \ - ILI9341_CMD(0xB6, 0x0A, 0xA2); /* Display Function Control */ \ - ILI9341_CMD(0xF6, 0x01, 0x30); \ - ILI9341_CMD(0xF2, 0x00); /* 3Gamma Function Disable */ \ + ILI9341_CMD(0xB2, 0x0C, 0x0C, 0x00, 0x33, 0x33); /* Porch Setting (0x0C, 0x0C=Std or 0x0F, 0x0F=Slow */ \ + ILI9341_CMD(0xC6, 0x03); /* ST7789 Frame Rate Control (0F=60, 07 to 00=75 to 119, 6Hz steps) */ \ + ILI9341_CMD(0xB6, 0x0A, 0x82); /* Gate Scan Direction (82=Std, A2=Inv, 22=Alt) */ \ + ILI9341_CMD(0xF6, 0x01, 0x00); /* Interface Control (01=Std, 21=Interleave */ \ ILI9341_CMD(0xE0, 0xD0, 0x00, 0x05, 0x0E, 0x15, 0x0D, 0x37, 0x43, 0x47, 0x09, 0x15, 0x12, 0x16, 0x19); \ - ILI9341_CMD(0xE1, 0xD0, 0x00, 0x05, 0x0D, 0x0C, 0x06, 0x2D, 0x44, 0x40, 0x0E, 0x1C, 0x18, 0x16, 0x19); + ILI9341_CMD(0xE1, 0xD0, 0x00, 0x05, 0x0D, 0x0C, 0x06, 0x2D, 0x44, 0x40, 0x0E, 0x1C, 0x18, 0x16, 0x19); \ + + + +#define RG_GPIO_LCD_MISO GPIO_NUM_NC +#define RG_GPIO_LCD_MOSI GPIO_NUM_12 +#define RG_GPIO_LCD_CLK GPIO_NUM_48 +#define RG_GPIO_LCD_CS GPIO_NUM_14 +#define RG_GPIO_LCD_DC GPIO_NUM_47 +#define RG_GPIO_LCD_BCKL GPIO_NUM_39 +#define RG_GPIO_LCD_RST GPIO_NUM_3 +// #define RG_GPIO_LCD_BCKL_INVERT // Uncomment if the LED is active LOW -// Input +/**************************************************************************** + * Input * + ****************************************************************************/ // Refer to rg_input.h to see all available RG_KEY_* and RG_GAMEPAD_*_MAP types #define RG_GAMEPAD_GPIO_MAP {\ {RG_KEY_UP, .num = GPIO_NUM_7, .pullup = 1, .level = 0},\ @@ -60,33 +105,31 @@ {RG_KEY_B, .num = GPIO_NUM_5, .pullup = 1, .level = 0},\ } -// Battery -#define RG_BATTERY_DRIVER 1 + +/**************************************************************************** + * Battery * + ****************************************************************************/ +#define RG_BATTERY_DRIVER 1 // 1 = ADC, 2 = MRGC #define RG_BATTERY_ADC_UNIT ADC_UNIT_1 #define RG_BATTERY_ADC_CHANNEL ADC_CHANNEL_3 #define RG_BATTERY_CALC_PERCENT(raw) (((raw) * 2.f - 3150.f) / (4100.f - 3150.f) * 100.f) #define RG_BATTERY_CALC_VOLTAGE(raw) ((raw) * 2.f * 0.001f) -// Status LED -#define RG_GPIO_LED GPIO_NUM_38 -// SPI Display -#define RG_GPIO_LCD_MISO GPIO_NUM_NC -#define RG_GPIO_LCD_MOSI GPIO_NUM_12 -#define RG_GPIO_LCD_CLK GPIO_NUM_48 -#define RG_GPIO_LCD_CS GPIO_NUM_14 -#define RG_GPIO_LCD_DC GPIO_NUM_47 -#define RG_GPIO_LCD_BCKL GPIO_NUM_39 -#define RG_GPIO_LCD_RST GPIO_NUM_3 +/**************************************************************************** + * Updater * + ****************************************************************************/ +#define RG_UPDATER_ENABLE 1 +#define RG_UPDATER_APPLICATION RG_APP_FACTORY +#define RG_UPDATER_DOWNLOAD_LOCATION RG_STORAGE_ROOT "/retro-go/updates" -// SPI SD Card -#define RG_GPIO_SDSPI_MISO GPIO_NUM_9 -#define RG_GPIO_SDSPI_MOSI GPIO_NUM_11 -#define RG_GPIO_SDSPI_CLK GPIO_NUM_13 -#define RG_GPIO_SDSPI_CS GPIO_NUM_10 -// External I2S DAC -#define RG_GPIO_SND_I2S_BCK 41 -#define RG_GPIO_SND_I2S_WS 42 -#define RG_GPIO_SND_I2S_DATA 40 -// #define RG_GPIO_SND_AMP_ENABLE 18 +/**************************************************************************** + * Miscellaneous * + ****************************************************************************/ +#define RG_RECOVERY_BTN RG_KEY_SELECT // Keep this button pressed to open the recovery menu + +#define RG_CUSTOM_PLATFORM_INIT() \ + /* Arbitrary code executed very early during retro-go init */ + +// See components/retro-go/config.h for more things you can define here! diff --git a/components/retro-go/targets/gb300-p4/config.h b/components/retro-go/targets/gb300-p4/config.h new file mode 100644 index 000000000..307816eb2 --- /dev/null +++ b/components/retro-go/targets/gb300-p4/config.h @@ -0,0 +1,149 @@ + /**************************************************************************** + * Target definition for GB300-P4 + * Guide: https://www.instructables.com/GB300-P4-a-ESP32-P4-Based-Retro-Handheld-Using-the + * Command to build: python rg_tool.py --target gb300-p4 build-img --no-networking + ****************************************************************************/ +#define RG_TARGET_NAME "GB300-P4" + + +/**************************************************************************** + * Status LED * + ****************************************************************************/ +// #define RG_LED_DRIVER 1 // 1 = GPIO +// #define RG_GPIO_LED GPIO_NUM_NC +// #define RG_GPIO_LED_INVERT // Uncomment if the LED is active LOW + + +/**************************************************************************** + * I2C / GPIO Extender * + ****************************************************************************/ +// #define RG_I2C_GPIO_DRIVER 0 // 1 = AW9523, 2 = PCF9539, 3 = MCP23017, 4 = PCF8575 +// #define RG_I2C_GPIO_ADDR 0x00 +// #define RG_GPIO_I2C_SDA GPIO_NUM_NC +// #define RG_GPIO_I2C_SCL GPIO_NUM_NC + + +/**************************************************************************** + * Storage * + ****************************************************************************/ +#define RG_STORAGE_ROOT "/sd" +// #define RG_STORAGE_SDSPI_HOST SPI3_HOST +// #define RG_STORAGE_SDSPI_SPEED SDMMC_FREQ_DEFAULT +// #define RG_GPIO_SDSPI_MISO GPIO_NUM_NC +// #define RG_GPIO_SDSPI_MOSI GPIO_NUM_NC +// #define RG_GPIO_SDSPI_CLK GPIO_NUM_NC +// #define RG_GPIO_SDSPI_CS GPIO_NUM_NC +#define RG_STORAGE_SDMMC_HOST SDMMC_HOST_SLOT_1 +#define RG_STORAGE_SDMMC_SPEED SDMMC_FREQ_HIGHSPEED // SDMMC_FREQ_PROBING, SDMMC_FREQ_HIGHSPEED or SDMMC_FREQ_DEFAULT +#define RG_GPIO_SDMMC_CLK GPIO_NUM_42 +#define RG_GPIO_SDMMC_CMD GPIO_NUM_41 +#define RG_GPIO_SDMMC_D0 GPIO_NUM_43 +#define RG_GPIO_SDMMC_D1 GPIO_NUM_44 +#define RG_GPIO_SDMMC_D2 GPIO_NUM_39 +#define RG_GPIO_SDMMC_D3 GPIO_NUM_40 +// #define RG_STORAGE_FLASH_PARTITION "vfs" + + +/**************************************************************************** + * Audio * + ****************************************************************************/ +#define RG_AUDIO_USE_INT_DAC 0 // 0 = Disable, 1 = GPIO25, 2 = GPIO26, 3 = Both +#define RG_AUDIO_USE_EXT_DAC 1 // 0 = Disable, 1 = Enable +#define RG_GPIO_SND_I2S_BCK GPIO_NUM_49 +#define RG_GPIO_SND_I2S_WS GPIO_NUM_48 +#define RG_GPIO_SND_I2S_DATA GPIO_NUM_50 +#define RG_GPIO_SND_AMP_ENABLE GPIO_NUM_47 +// #define RG_GPIO_SND_AMP_ENABLE_INVERT // Uncomment if the mute = HIGH + + +/**************************************************************************** + * Video * + ****************************************************************************/ +#define RG_SCREEN_DRIVER 0 // 0 = ILI9341/ST7789 +#define RG_SCREEN_HOST SPI2_HOST +#define RG_SCREEN_SPEED SPI_MASTER_FREQ_80M // SPI_MASTER_FREQ_40M or SPI_MASTER_FREQ_80M +#define RG_SCREEN_BACKLIGHT 1 +#define RG_SCREEN_WIDTH 320 +#define RG_SCREEN_HEIGHT 240 +#define RG_SCREEN_ROTATION 6 // Possible values are 0-7 (you'll have to experiment) +#define RG_SCREEN_RGB_BGR 1 // Possible values are 0-1 (change if colors are bad) +#define RG_SCREEN_PIXEL_FORMAT 0 // Possible values are 0=565_BE, 1=565_LE +#define RG_SCREEN_VISIBLE_AREA {0, 0, 0, 0} // Left, Top, Right, Bottom +#define RG_SCREEN_SAFE_AREA {0, 0, 0, 0} // Left, Top, Right, Bottom +#define RG_SCREEN_PARTIAL_UPDATES 1 +#define RG_SCREEN_INIT() \ + ILI9341_CMD(0x21); /* Inversion */ \ + ILI9341_CMD(0xC0, 0x1B); /* Power control //VRH[5:0] */ \ + ILI9341_CMD(0xC1, 0x12); /* Power control //SAP[2:0];BT[3:0] */ \ + ILI9341_CMD(0xC5, 0x32, 0x3C); /* VCM control */ \ + ILI9341_CMD(0xC7, 0x91); /* VCM control2 */ \ + ILI9341_CMD(0xB2, 0x0C, 0x0C, 0x00, 0x33, 0x33); /* Porch Setting (0x0C, 0x0C=Std or 0x0F, 0x0F=Slow */ \ + ILI9341_CMD(0xC6, 0x03); /* ST7789 Frame Rate Control (0F=60, 07 to 00=75 to 119, 6Hz steps) */ \ + ILI9341_CMD(0xB6, 0x0A, 0x82); /* Gate Scan Direction (82=Std, A2=Inv, 22=Alt) */ \ + ILI9341_CMD(0xF6, 0x01, 0x00); /* Interface Control (01=Std, 21=Interleave */ \ + ILI9341_CMD(0xE0, 0xD0, 0x00, 0x05, 0x0E, 0x15, 0x0D, 0x37, 0x43, 0x47, 0x09, 0x15, 0x12, 0x16, 0x19); \ + ILI9341_CMD(0xE1, 0xD0, 0x00, 0x05, 0x0D, 0x0C, 0x06, 0x2D, 0x44, 0x40, 0x0E, 0x1C, 0x18, 0x16, 0x19); \ + + +#define RG_GPIO_LCD_MISO GPIO_NUM_18 +#define RG_GPIO_LCD_MOSI GPIO_NUM_19 +#define RG_GPIO_LCD_CLK GPIO_NUM_22 +#define RG_GPIO_LCD_CS GPIO_NUM_20 +#define RG_GPIO_LCD_DC GPIO_NUM_21 +#define RG_GPIO_LCD_RST GPIO_NUM_23 +#define RG_GPIO_LCD_BCKL GPIO_NUM_17 +// #define RG_GPIO_LCD_BCKL_INVERT // Uncomment if the LED is active LOW + + +/**************************************************************************** + * Input * + ****************************************************************************/ +// Refer to rg_input.h to see all available RG_KEY_* and RG_GAMEPAD_*_MAP types +#define RG_GAMEPAD_GPIO_MAP {\ + {RG_KEY_LEFT, .num = GPIO_NUM_4, .pullup = 1, .level = 0},\ + {RG_KEY_RIGHT, .num = GPIO_NUM_2, .pullup = 1, .level = 0},\ + {RG_KEY_UP, .num = GPIO_NUM_5, .pullup = 1, .level = 0},\ + {RG_KEY_DOWN, .num = GPIO_NUM_3, .pullup = 1, .level = 0},\ + {RG_KEY_START, .num = GPIO_NUM_46, .pullup = 1, .level = 0},\ + {RG_KEY_SELECT, .num = GPIO_NUM_45, .pullup = 1, .level = 0},\ + {RG_KEY_A, .num = GPIO_NUM_26, .pullup = 1, .level = 0},\ + {RG_KEY_B, .num = GPIO_NUM_27, .pullup = 1, .level = 0},\ + {RG_KEY_X, .num = GPIO_NUM_13, .pullup = 1, .level = 0},\ + {RG_KEY_Y, .num = GPIO_NUM_12, .pullup = 1, .level = 0},\ + {RG_KEY_L, .num = GPIO_NUM_11, .pullup = 1, .level = 0},\ + {RG_KEY_R, .num = GPIO_NUM_14, .pullup = 1, .level = 0},\ +} +#define RG_GAMEPAD_VIRT_MAP {\ + {RG_KEY_MENU, .src = RG_KEY_START | RG_KEY_SELECT},\ + {RG_KEY_OPTION, .src = RG_KEY_START | RG_KEY_A},\ +} + + +/**************************************************************************** + * Battery * + ****************************************************************************/ +#define RG_BATTERY_DRIVER 1 // 1 = ADC, 2 = MRGC +#define RG_BATTERY_ADC_UNIT ADC_UNIT_1 +#define RG_BATTERY_ADC_CHANNEL ADC_CHANNEL_0 +#define RG_BATTERY_CALC_PERCENT(raw) (((raw) * 2.f - 3300.f) / (4100.f - 3300.f) * 100.f) +#define RG_BATTERY_CALC_VOLTAGE(raw) ((raw) * 2.f * 0.001f) + + +/**************************************************************************** + * Updater * + ****************************************************************************/ +#define RG_UPDATER_ENABLE 1 +#define RG_UPDATER_APPLICATION RG_APP_FACTORY +#define RG_UPDATER_DOWNLOAD_LOCATION RG_STORAGE_ROOT "/retro-go/updates" + + + +/**************************************************************************** + * Miscellaneous * + ****************************************************************************/ +#define RG_RECOVERY_BTN RG_KEY_SELECT // Keep this button pressed to open the recovery menu + +#define RG_CUSTOM_PLATFORM_INIT() \ + /* Arbitrary code executed very early during retro-go init */ + +// See components/retro-go/config.h for more things you can define here! diff --git a/components/retro-go/targets/gb300-p4/docs/GB300-P4-back.jpg b/components/retro-go/targets/gb300-p4/docs/GB300-P4-back.jpg new file mode 100644 index 000000000..0645963b1 Binary files /dev/null and b/components/retro-go/targets/gb300-p4/docs/GB300-P4-back.jpg differ diff --git a/components/retro-go/targets/gb300-p4/docs/GB300-P4.jpg b/components/retro-go/targets/gb300-p4/docs/GB300-P4.jpg new file mode 100644 index 000000000..da5242285 Binary files /dev/null and b/components/retro-go/targets/gb300-p4/docs/GB300-P4.jpg differ diff --git a/components/retro-go/targets/gb300-p4/docs/LCD-DATASHEET-STP0280A2-240320.pdf b/components/retro-go/targets/gb300-p4/docs/LCD-DATASHEET-STP0280A2-240320.pdf new file mode 100644 index 000000000..a394f875e Binary files /dev/null and b/components/retro-go/targets/gb300-p4/docs/LCD-DATASHEET-STP0280A2-240320.pdf differ diff --git a/components/retro-go/targets/gb300-p4/docs/README.md b/components/retro-go/targets/gb300-p4/docs/README.md new file mode 100644 index 000000000..bb685ec0a --- /dev/null +++ b/components/retro-go/targets/gb300-p4/docs/README.md @@ -0,0 +1,22 @@ +# GB300-P4 +- Build Guide & BOM: [Instructables guide](https://www.instructables.com/GB300-P4-a-ESP32-P4-Based-Retro-Handheld-Using-the/) +- Status: Complete + +Command to build (ESP-IDF v5.5): `python rg_tool.py --target gb300-p4 build-img --no-networking` + +## Hardware +- Sup+/Datafrog GB300 - Uses its shell, buttons, membranes, speaker, 18650 battery etc +- Wireless-Tag ESP32-P4 WT0132P4-A1-N16R32 +- ST7789V 320*240 2.8" SPI Display - STP0280A2-240320 +- SD card over SDMMC (4 bits) +- NS4168 DAC +- TP4056 charge chip +- 2.5mm audio jack +- Volume wheel +- USB-C for charging and firmware updates + + +## Images + +![GB300-P4.jpg](GB300-P4.jpg) +![GB300-P4-back.jpg](GB300-P4-back.jpg) diff --git a/components/retro-go/targets/gb300-p4/env.py b/components/retro-go/targets/gb300-p4/env.py new file mode 100644 index 000000000..71d181069 --- /dev/null +++ b/components/retro-go/targets/gb300-p4/env.py @@ -0,0 +1,9 @@ +# This file is injected late into rg_tool.py, you can run arbitrary python code here +# For example override python variables or set environment variables with os.putenv + +# Espressif chip in the device +IDF_TARGET = "esp32p4" +# .fw file format, if supported by the device +# FW_FORMAT = "odroid" +# Default apps to build when none is specified (comment to build all) +# DEFAULT_APPS = " ".join(PROJECT_APPS.keys()) # All of them all the time! diff --git a/components/retro-go/targets/gb300-p4/sdkconfig b/components/retro-go/targets/gb300-p4/sdkconfig new file mode 100644 index 000000000..4d375cbf5 --- /dev/null +++ b/components/retro-go/targets/gb300-p4/sdkconfig @@ -0,0 +1,2219 @@ +# +# Automatically generated file. DO NOT EDIT. +# Espressif IoT Development Framework (ESP-IDF) 5.5.0 Project Configuration +# +CONFIG_SOC_ADC_SUPPORTED=y +CONFIG_SOC_ANA_CMPR_SUPPORTED=y +CONFIG_SOC_DEDICATED_GPIO_SUPPORTED=y +CONFIG_SOC_UART_SUPPORTED=y +CONFIG_SOC_GDMA_SUPPORTED=y +CONFIG_SOC_UHCI_SUPPORTED=y +CONFIG_SOC_AHB_GDMA_SUPPORTED=y +CONFIG_SOC_AXI_GDMA_SUPPORTED=y +CONFIG_SOC_DW_GDMA_SUPPORTED=y +CONFIG_SOC_DMA2D_SUPPORTED=y +CONFIG_SOC_GPTIMER_SUPPORTED=y +CONFIG_SOC_PCNT_SUPPORTED=y +CONFIG_SOC_LCDCAM_SUPPORTED=y +CONFIG_SOC_LCDCAM_CAM_SUPPORTED=y +CONFIG_SOC_LCDCAM_I80_LCD_SUPPORTED=y +CONFIG_SOC_LCDCAM_RGB_LCD_SUPPORTED=y +CONFIG_SOC_MIPI_CSI_SUPPORTED=y +CONFIG_SOC_MIPI_DSI_SUPPORTED=y +CONFIG_SOC_MCPWM_SUPPORTED=y +CONFIG_SOC_TWAI_SUPPORTED=y +CONFIG_SOC_ETM_SUPPORTED=y +CONFIG_SOC_PARLIO_SUPPORTED=y +CONFIG_SOC_ASYNC_MEMCPY_SUPPORTED=y +CONFIG_SOC_EMAC_SUPPORTED=y +CONFIG_SOC_USB_OTG_SUPPORTED=y +CONFIG_SOC_WIRELESS_HOST_SUPPORTED=y +CONFIG_SOC_USB_SERIAL_JTAG_SUPPORTED=y +CONFIG_SOC_TEMP_SENSOR_SUPPORTED=y +CONFIG_SOC_SUPPORTS_SECURE_DL_MODE=y +CONFIG_SOC_ULP_SUPPORTED=y +CONFIG_SOC_LP_CORE_SUPPORTED=y +CONFIG_SOC_EFUSE_KEY_PURPOSE_FIELD=y +CONFIG_SOC_EFUSE_SUPPORTED=y +CONFIG_SOC_RTC_FAST_MEM_SUPPORTED=y +CONFIG_SOC_RTC_MEM_SUPPORTED=y +CONFIG_SOC_RMT_SUPPORTED=y +CONFIG_SOC_I2S_SUPPORTED=y +CONFIG_SOC_SDM_SUPPORTED=y +CONFIG_SOC_GPSPI_SUPPORTED=y +CONFIG_SOC_LEDC_SUPPORTED=y +CONFIG_SOC_ISP_SUPPORTED=y +CONFIG_SOC_I2C_SUPPORTED=y +CONFIG_SOC_SYSTIMER_SUPPORTED=y +CONFIG_SOC_AES_SUPPORTED=y +CONFIG_SOC_MPI_SUPPORTED=y +CONFIG_SOC_SHA_SUPPORTED=y +CONFIG_SOC_HMAC_SUPPORTED=y +CONFIG_SOC_DIG_SIGN_SUPPORTED=y +CONFIG_SOC_ECC_SUPPORTED=y +CONFIG_SOC_ECC_EXTENDED_MODES_SUPPORTED=y +CONFIG_SOC_FLASH_ENC_SUPPORTED=y +CONFIG_SOC_SECURE_BOOT_SUPPORTED=y +CONFIG_SOC_BOD_SUPPORTED=y +CONFIG_SOC_VBAT_SUPPORTED=y +CONFIG_SOC_APM_SUPPORTED=y +CONFIG_SOC_PMU_SUPPORTED=y +CONFIG_SOC_DCDC_SUPPORTED=y +CONFIG_SOC_PAU_SUPPORTED=y +CONFIG_SOC_LP_TIMER_SUPPORTED=y +CONFIG_SOC_ULP_LP_UART_SUPPORTED=y +CONFIG_SOC_LP_GPIO_MATRIX_SUPPORTED=y +CONFIG_SOC_LP_PERIPHERALS_SUPPORTED=y +CONFIG_SOC_LP_I2C_SUPPORTED=y +CONFIG_SOC_LP_I2S_SUPPORTED=y +CONFIG_SOC_LP_SPI_SUPPORTED=y +CONFIG_SOC_LP_ADC_SUPPORTED=y +CONFIG_SOC_LP_VAD_SUPPORTED=y +CONFIG_SOC_SPIRAM_SUPPORTED=y +CONFIG_SOC_PSRAM_DMA_CAPABLE=y +CONFIG_SOC_SDMMC_HOST_SUPPORTED=y +CONFIG_SOC_CLK_TREE_SUPPORTED=y +CONFIG_SOC_ASSIST_DEBUG_SUPPORTED=y +CONFIG_SOC_DEBUG_PROBE_SUPPORTED=y +CONFIG_SOC_WDT_SUPPORTED=y +CONFIG_SOC_SPI_FLASH_SUPPORTED=y +CONFIG_SOC_TOUCH_SENSOR_SUPPORTED=y +CONFIG_SOC_RNG_SUPPORTED=y +CONFIG_SOC_GP_LDO_SUPPORTED=y +CONFIG_SOC_PPA_SUPPORTED=y +CONFIG_SOC_LIGHT_SLEEP_SUPPORTED=y +CONFIG_SOC_DEEP_SLEEP_SUPPORTED=y +CONFIG_SOC_PM_SUPPORTED=y +CONFIG_SOC_BITSCRAMBLER_SUPPORTED=y +CONFIG_SOC_SIMD_INSTRUCTION_SUPPORTED=y +CONFIG_SOC_I3C_MASTER_SUPPORTED=y +CONFIG_SOC_XTAL_SUPPORT_40M=y +CONFIG_SOC_AES_SUPPORT_DMA=y +CONFIG_SOC_AES_SUPPORT_GCM=y +CONFIG_SOC_AES_GDMA=y +CONFIG_SOC_AES_SUPPORT_AES_128=y +CONFIG_SOC_AES_SUPPORT_AES_256=y +CONFIG_SOC_ADC_RTC_CTRL_SUPPORTED=y +CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED=y +CONFIG_SOC_ADC_DMA_SUPPORTED=y +CONFIG_SOC_ADC_PERIPH_NUM=2 +CONFIG_SOC_ADC_MAX_CHANNEL_NUM=8 +CONFIG_SOC_ADC_ATTEN_NUM=4 +CONFIG_SOC_ADC_DIGI_CONTROLLER_NUM=2 +CONFIG_SOC_ADC_PATT_LEN_MAX=16 +CONFIG_SOC_ADC_DIGI_MAX_BITWIDTH=12 +CONFIG_SOC_ADC_DIGI_MIN_BITWIDTH=12 +CONFIG_SOC_ADC_DIGI_IIR_FILTER_NUM=2 +CONFIG_SOC_ADC_DIGI_MONITOR_NUM=2 +CONFIG_SOC_ADC_DIGI_RESULT_BYTES=4 +CONFIG_SOC_ADC_DIGI_DATA_BYTES_PER_CONV=4 +CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_HIGH=83333 +CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_LOW=611 +CONFIG_SOC_ADC_RTC_MIN_BITWIDTH=12 +CONFIG_SOC_ADC_RTC_MAX_BITWIDTH=12 +CONFIG_SOC_ADC_CALIBRATION_V1_SUPPORTED=y +CONFIG_SOC_ADC_SELF_HW_CALI_SUPPORTED=y +CONFIG_SOC_ADC_CALIB_CHAN_COMPENS_SUPPORTED=y +CONFIG_SOC_ADC_SHARED_POWER=y +CONFIG_SOC_BROWNOUT_RESET_SUPPORTED=y +CONFIG_SOC_SHARED_IDCACHE_SUPPORTED=y +CONFIG_SOC_CACHE_WRITEBACK_SUPPORTED=y +CONFIG_SOC_CACHE_FREEZE_SUPPORTED=y +CONFIG_SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE=y +CONFIG_SOC_CPU_CORES_NUM=2 +CONFIG_SOC_CPU_INTR_NUM=32 +CONFIG_SOC_CPU_HAS_FLEXIBLE_INTC=y +CONFIG_SOC_INT_CLIC_SUPPORTED=y +CONFIG_SOC_INT_HW_NESTED_SUPPORTED=y +CONFIG_SOC_BRANCH_PREDICTOR_SUPPORTED=y +CONFIG_SOC_CPU_COPROC_NUM=3 +CONFIG_SOC_CPU_HAS_FPU=y +CONFIG_SOC_CPU_HAS_FPU_EXT_ILL_BUG=y +CONFIG_SOC_CPU_HAS_HWLOOP=y +CONFIG_SOC_CPU_HAS_HWLOOP_STATE_BUG=y +CONFIG_SOC_CPU_HAS_PIE=y +CONFIG_SOC_HP_CPU_HAS_MULTIPLE_CORES=y +CONFIG_SOC_CPU_BREAKPOINTS_NUM=3 +CONFIG_SOC_CPU_WATCHPOINTS_NUM=3 +CONFIG_SOC_CPU_WATCHPOINT_MAX_REGION_SIZE=0x100 +CONFIG_SOC_CPU_HAS_PMA=y +CONFIG_SOC_CPU_IDRAM_SPLIT_USING_PMP=y +CONFIG_SOC_CPU_PMP_REGION_GRANULARITY=128 +CONFIG_SOC_CPU_HAS_LOCKUP_RESET=y +CONFIG_SOC_SIMD_PREFERRED_DATA_ALIGNMENT=16 +CONFIG_SOC_DS_SIGNATURE_MAX_BIT_LEN=4096 +CONFIG_SOC_DS_KEY_PARAM_MD_IV_LENGTH=16 +CONFIG_SOC_DS_KEY_CHECK_MAX_WAIT_US=1100 +CONFIG_SOC_DMA_CAN_ACCESS_FLASH=y +CONFIG_SOC_AHB_GDMA_VERSION=2 +CONFIG_SOC_GDMA_SUPPORT_CRC=y +CONFIG_SOC_GDMA_NUM_GROUPS_MAX=2 +CONFIG_SOC_GDMA_PAIRS_PER_GROUP_MAX=3 +CONFIG_SOC_AXI_GDMA_SUPPORT_PSRAM=y +CONFIG_SOC_GDMA_SUPPORT_ETM=y +CONFIG_SOC_GDMA_SUPPORT_SLEEP_RETENTION=y +CONFIG_SOC_AXI_DMA_EXT_MEM_ENC_ALIGNMENT=16 +CONFIG_SOC_DMA2D_GROUPS=1 +CONFIG_SOC_DMA2D_TX_CHANNELS_PER_GROUP=3 +CONFIG_SOC_DMA2D_RX_CHANNELS_PER_GROUP=2 +CONFIG_SOC_ETM_GROUPS=1 +CONFIG_SOC_ETM_CHANNELS_PER_GROUP=50 +CONFIG_SOC_ETM_SUPPORT_SLEEP_RETENTION=y +CONFIG_SOC_GPIO_PORT=1 +CONFIG_SOC_GPIO_PIN_COUNT=55 +CONFIG_SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER=y +CONFIG_SOC_GPIO_FLEX_GLITCH_FILTER_NUM=8 +CONFIG_SOC_GPIO_SUPPORT_PIN_HYS_FILTER=y +CONFIG_SOC_GPIO_SUPPORT_ETM=y +CONFIG_SOC_GPIO_SUPPORT_RTC_INDEPENDENT=y +CONFIG_SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP=y +CONFIG_SOC_LP_IO_HAS_INDEPENDENT_WAKEUP_SOURCE=y +CONFIG_SOC_LP_IO_CLOCK_IS_INDEPENDENT=y +CONFIG_SOC_GPIO_VALID_GPIO_MASK=0x007FFFFFFFFFFFFF +CONFIG_SOC_GPIO_IN_RANGE_MAX=54 +CONFIG_SOC_GPIO_OUT_RANGE_MAX=54 +CONFIG_SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK=0 +CONFIG_SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT=16 +CONFIG_SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK=0x007FFFFFFFFF0000 +CONFIG_SOC_GPIO_CLOCKOUT_BY_GPIO_MATRIX=y +CONFIG_SOC_GPIO_CLOCKOUT_CHANNEL_NUM=2 +CONFIG_SOC_CLOCKOUT_SUPPORT_CHANNEL_DIVIDER=y +CONFIG_SOC_DEBUG_PROBE_NUM_UNIT=1 +CONFIG_SOC_DEBUG_PROBE_MAX_OUTPUT_WIDTH=16 +CONFIG_SOC_GPIO_SUPPORT_FORCE_HOLD=y +CONFIG_SOC_RTCIO_PIN_COUNT=16 +CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED=y +CONFIG_SOC_RTCIO_HOLD_SUPPORTED=y +CONFIG_SOC_RTCIO_WAKE_SUPPORTED=y +CONFIG_SOC_RTCIO_EDGE_WAKE_SUPPORTED=y +CONFIG_SOC_DEDIC_GPIO_OUT_CHANNELS_NUM=8 +CONFIG_SOC_DEDIC_GPIO_IN_CHANNELS_NUM=8 +CONFIG_SOC_DEDIC_PERIPH_ALWAYS_ENABLE=y +CONFIG_SOC_ANA_CMPR_NUM=2 +CONFIG_SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE=y +CONFIG_SOC_ANA_CMPR_SUPPORT_ETM=y +CONFIG_SOC_I2C_NUM=3 +CONFIG_SOC_HP_I2C_NUM=2 +CONFIG_SOC_I2C_FIFO_LEN=32 +CONFIG_SOC_I2C_CMD_REG_NUM=8 +CONFIG_SOC_I2C_SUPPORT_SLAVE=y +CONFIG_SOC_I2C_SUPPORT_HW_FSM_RST=y +CONFIG_SOC_I2C_SUPPORT_HW_CLR_BUS=y +CONFIG_SOC_I2C_SUPPORT_XTAL=y +CONFIG_SOC_I2C_SUPPORT_RTC=y +CONFIG_SOC_I2C_SUPPORT_10BIT_ADDR=y +CONFIG_SOC_I2C_SLAVE_SUPPORT_BROADCAST=y +CONFIG_SOC_I2C_SLAVE_CAN_GET_STRETCH_CAUSE=y +CONFIG_SOC_I2C_SLAVE_SUPPORT_I2CRAM_ACCESS=y +CONFIG_SOC_I2C_SLAVE_SUPPORT_SLAVE_UNMATCH=y +CONFIG_SOC_I2C_SUPPORT_SLEEP_RETENTION=y +CONFIG_SOC_LP_I2C_NUM=1 +CONFIG_SOC_LP_I2C_FIFO_LEN=16 +CONFIG_SOC_I2S_NUM=3 +CONFIG_SOC_I2S_HW_VERSION_2=y +CONFIG_SOC_I2S_SUPPORTS_ETM=y +CONFIG_SOC_I2S_SUPPORTS_XTAL=y +CONFIG_SOC_I2S_SUPPORTS_APLL=y +CONFIG_SOC_I2S_SUPPORTS_PCM=y +CONFIG_SOC_I2S_SUPPORTS_PDM=y +CONFIG_SOC_I2S_SUPPORTS_PDM_TX=y +CONFIG_SOC_I2S_SUPPORTS_PCM2PDM=y +CONFIG_SOC_I2S_SUPPORTS_PDM_RX=y +CONFIG_SOC_I2S_SUPPORTS_PDM2PCM=y +CONFIG_SOC_I2S_SUPPORTS_PDM_RX_HP_FILTER=y +CONFIG_SOC_I2S_SUPPORTS_TX_SYNC_CNT=y +CONFIG_SOC_I2S_SUPPORTS_TDM=y +CONFIG_SOC_I2S_PDM_MAX_TX_LINES=2 +CONFIG_SOC_I2S_PDM_MAX_RX_LINES=4 +CONFIG_SOC_I2S_TDM_FULL_DATA_WIDTH=y +CONFIG_SOC_I2S_SUPPORT_SLEEP_RETENTION=y +CONFIG_SOC_LP_I2S_NUM=1 +CONFIG_SOC_ISP_BF_SUPPORTED=y +CONFIG_SOC_ISP_CCM_SUPPORTED=y +CONFIG_SOC_ISP_DEMOSAIC_SUPPORTED=y +CONFIG_SOC_ISP_DVP_SUPPORTED=y +CONFIG_SOC_ISP_SHARPEN_SUPPORTED=y +CONFIG_SOC_ISP_COLOR_SUPPORTED=y +CONFIG_SOC_ISP_LSC_SUPPORTED=y +CONFIG_SOC_ISP_SHARE_CSI_BRG=y +CONFIG_SOC_ISP_NUMS=1 +CONFIG_SOC_ISP_DVP_CTLR_NUMS=1 +CONFIG_SOC_ISP_AE_CTLR_NUMS=1 +CONFIG_SOC_ISP_AE_BLOCK_X_NUMS=5 +CONFIG_SOC_ISP_AE_BLOCK_Y_NUMS=5 +CONFIG_SOC_ISP_AF_CTLR_NUMS=1 +CONFIG_SOC_ISP_AF_WINDOW_NUMS=3 +CONFIG_SOC_ISP_BF_TEMPLATE_X_NUMS=3 +CONFIG_SOC_ISP_BF_TEMPLATE_Y_NUMS=3 +CONFIG_SOC_ISP_CCM_DIMENSION=3 +CONFIG_SOC_ISP_DEMOSAIC_GRAD_RATIO_INT_BITS=2 +CONFIG_SOC_ISP_DEMOSAIC_GRAD_RATIO_DEC_BITS=4 +CONFIG_SOC_ISP_DEMOSAIC_GRAD_RATIO_RES_BITS=26 +CONFIG_SOC_ISP_DVP_DATA_WIDTH_MAX=16 +CONFIG_SOC_ISP_SHARPEN_TEMPLATE_X_NUMS=3 +CONFIG_SOC_ISP_SHARPEN_TEMPLATE_Y_NUMS=3 +CONFIG_SOC_ISP_SHARPEN_H_FREQ_COEF_INT_BITS=3 +CONFIG_SOC_ISP_SHARPEN_H_FREQ_COEF_DEC_BITS=5 +CONFIG_SOC_ISP_SHARPEN_H_FREQ_COEF_RES_BITS=24 +CONFIG_SOC_ISP_SHARPEN_M_FREQ_COEF_INT_BITS=3 +CONFIG_SOC_ISP_SHARPEN_M_FREQ_COEF_DEC_BITS=5 +CONFIG_SOC_ISP_SHARPEN_M_FREQ_COEF_RES_BITS=24 +CONFIG_SOC_ISP_HIST_CTLR_NUMS=1 +CONFIG_SOC_ISP_HIST_BLOCK_X_NUMS=5 +CONFIG_SOC_ISP_HIST_BLOCK_Y_NUMS=5 +CONFIG_SOC_ISP_HIST_SEGMENT_NUMS=16 +CONFIG_SOC_ISP_HIST_INTERVAL_NUMS=15 +CONFIG_SOC_ISP_LSC_GRAD_RATIO_INT_BITS=2 +CONFIG_SOC_ISP_LSC_GRAD_RATIO_DEC_BITS=8 +CONFIG_SOC_ISP_LSC_GRAD_RATIO_RES_BITS=22 +CONFIG_SOC_LEDC_SUPPORT_PLL_DIV_CLOCK=y +CONFIG_SOC_LEDC_SUPPORT_XTAL_CLOCK=y +CONFIG_SOC_LEDC_TIMER_NUM=4 +CONFIG_SOC_LEDC_CHANNEL_NUM=8 +CONFIG_SOC_LEDC_TIMER_BIT_WIDTH=20 +CONFIG_SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED=y +CONFIG_SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX=16 +CONFIG_SOC_LEDC_SUPPORT_FADE_STOP=y +CONFIG_SOC_LEDC_FADE_PARAMS_BIT_WIDTH=10 +CONFIG_SOC_LEDC_SUPPORT_SLEEP_RETENTION=y +CONFIG_SOC_MMU_PERIPH_NUM=2 +CONFIG_SOC_MMU_LINEAR_ADDRESS_REGION_NUM=2 +CONFIG_SOC_MMU_DI_VADDR_SHARED=y +CONFIG_SOC_MMU_PER_EXT_MEM_TARGET=y +CONFIG_SOC_MPU_MIN_REGION_SIZE=0x20000000 +CONFIG_SOC_MPU_REGIONS_MAX_NUM=8 +CONFIG_SOC_PCNT_GROUPS=1 +CONFIG_SOC_PCNT_UNITS_PER_GROUP=4 +CONFIG_SOC_PCNT_CHANNELS_PER_UNIT=2 +CONFIG_SOC_PCNT_THRES_POINT_PER_UNIT=2 +CONFIG_SOC_PCNT_SUPPORT_RUNTIME_THRES_UPDATE=y +CONFIG_SOC_PCNT_SUPPORT_CLEAR_SIGNAL=y +CONFIG_SOC_PCNT_SUPPORT_SLEEP_RETENTION=y +CONFIG_SOC_RMT_GROUPS=1 +CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP=4 +CONFIG_SOC_RMT_RX_CANDIDATES_PER_GROUP=4 +CONFIG_SOC_RMT_CHANNELS_PER_GROUP=8 +CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL=48 +CONFIG_SOC_RMT_SUPPORT_RX_PINGPONG=y +CONFIG_SOC_RMT_SUPPORT_RX_DEMODULATION=y +CONFIG_SOC_RMT_SUPPORT_TX_ASYNC_STOP=y +CONFIG_SOC_RMT_SUPPORT_TX_LOOP_COUNT=y +CONFIG_SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP=y +CONFIG_SOC_RMT_SUPPORT_TX_SYNCHRO=y +CONFIG_SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY=y +CONFIG_SOC_RMT_SUPPORT_XTAL=y +CONFIG_SOC_RMT_SUPPORT_RC_FAST=y +CONFIG_SOC_RMT_SUPPORT_DMA=y +CONFIG_SOC_RMT_SUPPORT_SLEEP_RETENTION=y +CONFIG_SOC_LCD_I80_SUPPORTED=y +CONFIG_SOC_LCD_RGB_SUPPORTED=y +CONFIG_SOC_LCDCAM_I80_NUM_BUSES=1 +CONFIG_SOC_LCDCAM_I80_BUS_WIDTH=24 +CONFIG_SOC_LCDCAM_RGB_NUM_PANELS=1 +CONFIG_SOC_LCDCAM_RGB_DATA_WIDTH=24 +CONFIG_SOC_LCD_SUPPORT_RGB_YUV_CONV=y +CONFIG_SOC_MCPWM_GROUPS=2 +CONFIG_SOC_MCPWM_TIMERS_PER_GROUP=3 +CONFIG_SOC_MCPWM_OPERATORS_PER_GROUP=3 +CONFIG_SOC_MCPWM_COMPARATORS_PER_OPERATOR=2 +CONFIG_SOC_MCPWM_EVENT_COMPARATORS_PER_OPERATOR=2 +CONFIG_SOC_MCPWM_GENERATORS_PER_OPERATOR=2 +CONFIG_SOC_MCPWM_TRIGGERS_PER_OPERATOR=2 +CONFIG_SOC_MCPWM_GPIO_FAULTS_PER_GROUP=3 +CONFIG_SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP=y +CONFIG_SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER=3 +CONFIG_SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP=3 +CONFIG_SOC_MCPWM_SWSYNC_CAN_PROPAGATE=y +CONFIG_SOC_MCPWM_SUPPORT_ETM=y +CONFIG_SOC_MCPWM_SUPPORT_EVENT_COMPARATOR=y +CONFIG_SOC_MCPWM_CAPTURE_CLK_FROM_GROUP=y +CONFIG_SOC_MCPWM_SUPPORT_SLEEP_RETENTION=y +CONFIG_SOC_USB_OTG_PERIPH_NUM=2 +CONFIG_SOC_USB_UTMI_PHY_NUM=1 +CONFIG_SOC_USB_UTMI_PHY_NO_POWER_OFF_ISO=y +CONFIG_SOC_PARLIO_GROUPS=1 +CONFIG_SOC_PARLIO_TX_UNITS_PER_GROUP=1 +CONFIG_SOC_PARLIO_RX_UNITS_PER_GROUP=1 +CONFIG_SOC_PARLIO_TX_UNIT_MAX_DATA_WIDTH=16 +CONFIG_SOC_PARLIO_RX_UNIT_MAX_DATA_WIDTH=16 +CONFIG_SOC_PARLIO_TX_CLK_SUPPORT_GATING=y +CONFIG_SOC_PARLIO_RX_CLK_SUPPORT_GATING=y +CONFIG_SOC_PARLIO_RX_CLK_SUPPORT_OUTPUT=y +CONFIG_SOC_PARLIO_TRANS_BIT_ALIGN=y +CONFIG_SOC_PARLIO_TX_SUPPORT_LOOP_TRANSMISSION=y +CONFIG_SOC_PARLIO_SUPPORT_SLEEP_RETENTION=y +CONFIG_SOC_PARLIO_SUPPORT_SPI_LCD=y +CONFIG_SOC_PARLIO_SUPPORT_I80_LCD=y +CONFIG_SOC_MPI_MEM_BLOCKS_NUM=4 +CONFIG_SOC_MPI_OPERATIONS_NUM=3 +CONFIG_SOC_RSA_MAX_BIT_LEN=4096 +CONFIG_SOC_SDMMC_USE_IOMUX=y +CONFIG_SOC_SDMMC_USE_GPIO_MATRIX=y +CONFIG_SOC_SDMMC_NUM_SLOTS=2 +CONFIG_SOC_SDMMC_DELAY_PHASE_NUM=4 +CONFIG_SOC_SDMMC_IO_POWER_EXTERNAL=y +CONFIG_SOC_SDMMC_PSRAM_DMA_CAPABLE=y +CONFIG_SOC_SDMMC_UHS_I_SUPPORTED=y +CONFIG_SOC_SHA_DMA_MAX_BUFFER_SIZE=3968 +CONFIG_SOC_SHA_SUPPORT_DMA=y +CONFIG_SOC_SHA_SUPPORT_RESUME=y +CONFIG_SOC_SHA_GDMA=y +CONFIG_SOC_SHA_SUPPORT_SHA1=y +CONFIG_SOC_SHA_SUPPORT_SHA224=y +CONFIG_SOC_SHA_SUPPORT_SHA256=y +CONFIG_SOC_SHA_SUPPORT_SHA384=y +CONFIG_SOC_SHA_SUPPORT_SHA512=y +CONFIG_SOC_SHA_SUPPORT_SHA512_224=y +CONFIG_SOC_SHA_SUPPORT_SHA512_256=y +CONFIG_SOC_SHA_SUPPORT_SHA512_T=y +CONFIG_SOC_ECDSA_SUPPORT_EXPORT_PUBKEY=y +CONFIG_SOC_ECDSA_SUPPORT_DETERMINISTIC_MODE=y +CONFIG_SOC_ECDSA_USES_MPI=y +CONFIG_SOC_SDM_GROUPS=1 +CONFIG_SOC_SDM_CHANNELS_PER_GROUP=8 +CONFIG_SOC_SDM_CLK_SUPPORT_PLL_F80M=y +CONFIG_SOC_SDM_CLK_SUPPORT_XTAL=y +CONFIG_SOC_SPI_PERIPH_NUM=3 +CONFIG_SOC_SPI_MAX_CS_NUM=6 +CONFIG_SOC_SPI_MAXIMUM_BUFFER_SIZE=64 +CONFIG_SOC_SPI_SUPPORT_SLEEP_RETENTION=y +CONFIG_SOC_SPI_SUPPORT_SLAVE_HD_VER2=y +CONFIG_SOC_SPI_SLAVE_SUPPORT_SEG_TRANS=y +CONFIG_SOC_SPI_SUPPORT_DDRCLK=y +CONFIG_SOC_SPI_SUPPORT_CD_SIG=y +CONFIG_SOC_SPI_SUPPORT_OCT=y +CONFIG_SOC_SPI_SUPPORT_CLK_XTAL=y +CONFIG_SOC_SPI_SUPPORT_CLK_RC_FAST=y +CONFIG_SOC_SPI_SUPPORT_CLK_SPLL=y +CONFIG_SOC_MSPI_HAS_INDEPENT_IOMUX=y +CONFIG_SOC_MEMSPI_IS_INDEPENDENT=y +CONFIG_SOC_SPI_MAX_PRE_DIVIDER=16 +CONFIG_SOC_LP_SPI_PERIPH_NUM=y +CONFIG_SOC_LP_SPI_MAXIMUM_BUFFER_SIZE=64 +CONFIG_SOC_SPIRAM_XIP_SUPPORTED=y +CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE=y +CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND=y +CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_RESUME=y +CONFIG_SOC_SPI_MEM_SUPPORT_IDLE_INTR=y +CONFIG_SOC_SPI_MEM_SUPPORT_SW_SUSPEND=y +CONFIG_SOC_SPI_MEM_SUPPORT_CHECK_SUS=y +CONFIG_SOC_SPI_MEM_SUPPORT_TIMING_TUNING=y +CONFIG_SOC_MEMSPI_TIMING_TUNING_BY_DQS=y +CONFIG_SOC_MEMSPI_TIMING_TUNING_BY_FLASH_DELAY=y +CONFIG_SOC_SPI_MEM_SUPPORT_CACHE_32BIT_ADDR_MAP=y +CONFIG_SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUT=y +CONFIG_SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED=y +CONFIG_SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED=y +CONFIG_SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED=y +CONFIG_SOC_MEMSPI_SRC_FREQ_120M_SUPPORTED=y +CONFIG_SOC_MEMSPI_FLASH_PSRAM_INDEPENDENT=y +CONFIG_SOC_SYSTIMER_COUNTER_NUM=2 +CONFIG_SOC_SYSTIMER_ALARM_NUM=3 +CONFIG_SOC_SYSTIMER_BIT_WIDTH_LO=32 +CONFIG_SOC_SYSTIMER_BIT_WIDTH_HI=20 +CONFIG_SOC_SYSTIMER_FIXED_DIVIDER=y +CONFIG_SOC_SYSTIMER_SUPPORT_RC_FAST=y +CONFIG_SOC_SYSTIMER_INT_LEVEL=y +CONFIG_SOC_SYSTIMER_ALARM_MISS_COMPENSATE=y +CONFIG_SOC_SYSTIMER_SUPPORT_ETM=y +CONFIG_SOC_LP_TIMER_BIT_WIDTH_LO=32 +CONFIG_SOC_LP_TIMER_BIT_WIDTH_HI=16 +CONFIG_SOC_TIMER_GROUPS=2 +CONFIG_SOC_TIMER_GROUP_TIMERS_PER_GROUP=2 +CONFIG_SOC_TIMER_GROUP_COUNTER_BIT_WIDTH=54 +CONFIG_SOC_TIMER_GROUP_SUPPORT_XTAL=y +CONFIG_SOC_TIMER_GROUP_SUPPORT_RC_FAST=y +CONFIG_SOC_TIMER_GROUP_TOTAL_TIMERS=4 +CONFIG_SOC_TIMER_SUPPORT_ETM=y +CONFIG_SOC_TIMER_SUPPORT_SLEEP_RETENTION=y +CONFIG_SOC_MWDT_SUPPORT_XTAL=y +CONFIG_SOC_MWDT_SUPPORT_SLEEP_RETENTION=y +CONFIG_SOC_TOUCH_SENSOR_VERSION=3 +CONFIG_SOC_TOUCH_SENSOR_NUM=14 +CONFIG_SOC_TOUCH_MIN_CHAN_ID=1 +CONFIG_SOC_TOUCH_MAX_CHAN_ID=14 +CONFIG_SOC_TOUCH_SUPPORT_SLEEP_WAKEUP=y +CONFIG_SOC_TOUCH_SUPPORT_BENCHMARK=y +CONFIG_SOC_TOUCH_SUPPORT_WATERPROOF=y +CONFIG_SOC_TOUCH_SUPPORT_PROX_SENSING=y +CONFIG_SOC_TOUCH_PROXIMITY_CHANNEL_NUM=3 +CONFIG_SOC_TOUCH_PROXIMITY_MEAS_DONE_SUPPORTED=y +CONFIG_SOC_TOUCH_SUPPORT_FREQ_HOP=y +CONFIG_SOC_TOUCH_SAMPLE_CFG_NUM=3 +CONFIG_SOC_TWAI_CONTROLLER_NUM=3 +CONFIG_SOC_TWAI_MASK_FILTER_NUM=1 +CONFIG_SOC_TWAI_CLK_SUPPORT_XTAL=y +CONFIG_SOC_TWAI_BRP_MIN=2 +CONFIG_SOC_TWAI_BRP_MAX=32768 +CONFIG_SOC_TWAI_SUPPORTS_RX_STATUS=y +CONFIG_SOC_TWAI_SUPPORT_SLEEP_RETENTION=y +CONFIG_SOC_EFUSE_DIS_PAD_JTAG=y +CONFIG_SOC_EFUSE_DIS_USB_JTAG=y +CONFIG_SOC_EFUSE_DIS_DIRECT_BOOT=y +CONFIG_SOC_EFUSE_SOFT_DIS_JTAG=y +CONFIG_SOC_EFUSE_DIS_DOWNLOAD_MSPI=y +CONFIG_SOC_EFUSE_ECDSA_KEY=y +CONFIG_SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY=y +CONFIG_SOC_KEY_MANAGER_FE_KEY_DEPLOY=y +CONFIG_SOC_SECURE_BOOT_V2_RSA=y +CONFIG_SOC_SECURE_BOOT_V2_ECC=y +CONFIG_SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS=3 +CONFIG_SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS=y +CONFIG_SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY=y +CONFIG_SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX=64 +CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES=y +CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_OPTIONS=y +CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_128=y +CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_256=y +CONFIG_SOC_UART_NUM=6 +CONFIG_SOC_UART_HP_NUM=5 +CONFIG_SOC_UART_LP_NUM=1 +CONFIG_SOC_UART_FIFO_LEN=128 +CONFIG_SOC_LP_UART_FIFO_LEN=16 +CONFIG_SOC_UART_BITRATE_MAX=5000000 +CONFIG_SOC_UART_SUPPORT_PLL_F80M_CLK=y +CONFIG_SOC_UART_SUPPORT_RTC_CLK=y +CONFIG_SOC_UART_SUPPORT_XTAL_CLK=y +CONFIG_SOC_UART_SUPPORT_WAKEUP_INT=y +CONFIG_SOC_UART_HAS_LP_UART=y +CONFIG_SOC_UART_SUPPORT_SLEEP_RETENTION=y +CONFIG_SOC_UART_SUPPORT_FSM_TX_WAIT_SEND=y +CONFIG_SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN=5 +CONFIG_SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE=y +CONFIG_SOC_UART_WAKEUP_SUPPORT_FIFO_THRESH_MODE=y +CONFIG_SOC_UART_WAKEUP_SUPPORT_START_BIT_MODE=y +CONFIG_SOC_UART_WAKEUP_SUPPORT_CHAR_SEQ_MODE=y +CONFIG_SOC_LP_I2S_SUPPORT_VAD=y +CONFIG_SOC_UHCI_NUM=1 +CONFIG_SOC_COEX_HW_PTI=y +CONFIG_SOC_PHY_DIG_REGS_MEM_SIZE=21 +CONFIG_SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH=12 +CONFIG_SOC_PM_SUPPORT_EXT1_WAKEUP=y +CONFIG_SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN=y +CONFIG_SOC_PM_EXT1_WAKEUP_BY_PMU=y +CONFIG_SOC_PM_SUPPORT_WIFI_WAKEUP=y +CONFIG_SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP=y +CONFIG_SOC_PM_SUPPORT_XTAL32K_PD=y +CONFIG_SOC_PM_SUPPORT_RC32K_PD=y +CONFIG_SOC_PM_SUPPORT_RC_FAST_PD=y +CONFIG_SOC_PM_SUPPORT_VDDSDIO_PD=y +CONFIG_SOC_PM_SUPPORT_TOP_PD=y +CONFIG_SOC_PM_SUPPORT_CNNT_PD=y +CONFIG_SOC_PM_SUPPORT_RTC_PERIPH_PD=y +CONFIG_SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY=y +CONFIG_SOC_PM_CPU_RETENTION_BY_SW=y +CONFIG_SOC_PM_CACHE_RETENTION_BY_PAU=y +CONFIG_SOC_PM_PAU_LINK_NUM=4 +CONFIG_SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR=y +CONFIG_SOC_PAU_IN_TOP_DOMAIN=y +CONFIG_SOC_CPU_IN_TOP_DOMAIN=y +CONFIG_SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE=y +CONFIG_SOC_SLEEP_SYSTIMER_STALL_WORKAROUND=y +CONFIG_SOC_SLEEP_TGWDT_STOP_WORKAROUND=y +CONFIG_SOC_PM_RETENTION_MODULE_NUM=64 +CONFIG_SOC_PSRAM_VDD_POWER_MPLL=y +CONFIG_SOC_CLK_RC_FAST_SUPPORT_CALIBRATION=y +CONFIG_SOC_CLK_APLL_SUPPORTED=y +CONFIG_SOC_CLK_MPLL_SUPPORTED=y +CONFIG_SOC_CLK_SDIO_PLL_SUPPORTED=y +CONFIG_SOC_CLK_XTAL32K_SUPPORTED=y +CONFIG_SOC_CLK_RC32K_SUPPORTED=y +CONFIG_SOC_CLK_LP_FAST_SUPPORT_LP_PLL=y +CONFIG_SOC_CLK_LP_FAST_SUPPORT_XTAL=y +CONFIG_SOC_PERIPH_CLK_CTRL_SHARED=y +CONFIG_SOC_CLK_ANA_I2C_MST_HAS_ROOT_GATE=y +CONFIG_SOC_TEMPERATURE_SENSOR_LP_PLL_SUPPORT=y +CONFIG_SOC_TEMPERATURE_SENSOR_INTR_SUPPORT=y +CONFIG_SOC_TSENS_IS_INDEPENDENT_FROM_ADC=y +CONFIG_SOC_TEMPERATURE_SENSOR_SUPPORT_ETM=y +CONFIG_SOC_TEMPERATURE_SENSOR_SUPPORT_SLEEP_RETENTION=y +CONFIG_SOC_MEM_TCM_SUPPORTED=y +CONFIG_SOC_MEM_NON_CONTIGUOUS_SRAM=y +CONFIG_SOC_ASYNCHRONOUS_BUS_ERROR_MODE=y +CONFIG_SOC_EMAC_IEEE1588V2_SUPPORTED=y +CONFIG_SOC_EMAC_USE_MULTI_IO_MUX=y +CONFIG_SOC_EMAC_MII_USE_GPIO_MATRIX=y +CONFIG_SOC_JPEG_CODEC_SUPPORTED=y +CONFIG_SOC_JPEG_DECODE_SUPPORTED=y +CONFIG_SOC_JPEG_ENCODE_SUPPORTED=y +CONFIG_SOC_LCDCAM_CAM_SUPPORT_RGB_YUV_CONV=y +CONFIG_SOC_LCDCAM_CAM_PERIPH_NUM=1 +CONFIG_SOC_LCDCAM_CAM_DATA_WIDTH_MAX=16 +CONFIG_SOC_I3C_MASTER_PERIPH_NUM=y +CONFIG_SOC_I3C_MASTER_ADDRESS_TABLE_NUM=12 +CONFIG_SOC_I3C_MASTER_COMMAND_TABLE_NUM=12 +CONFIG_SOC_LP_CORE_SUPPORT_ETM=y +CONFIG_SOC_LP_CORE_SUPPORT_LP_ADC=y +CONFIG_SOC_LP_CORE_SUPPORT_LP_VAD=y +CONFIG_SOC_LP_CORE_SUPPORT_STORE_LOAD_EXCEPTIONS=y +CONFIG_IDF_CMAKE=y +CONFIG_IDF_TOOLCHAIN="gcc" +CONFIG_IDF_TOOLCHAIN_GCC=y +CONFIG_IDF_TARGET_ARCH_RISCV=y +CONFIG_IDF_TARGET_ARCH="riscv" +CONFIG_IDF_TARGET="esp32p4" +CONFIG_IDF_INIT_VERSION="5.3.1" +CONFIG_IDF_TARGET_ESP32P4=y +CONFIG_IDF_FIRMWARE_CHIP_ID=0x0012 + +# +# Build type +# +CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y +# CONFIG_APP_BUILD_TYPE_RAM is not set +CONFIG_APP_BUILD_GENERATE_BINARIES=y +CONFIG_APP_BUILD_BOOTLOADER=y +CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y +# CONFIG_APP_REPRODUCIBLE_BUILD is not set +# CONFIG_APP_NO_BLOBS is not set +# end of Build type + +# +# Bootloader config +# + +# +# Bootloader manager +# +CONFIG_BOOTLOADER_COMPILE_TIME_DATE=y +CONFIG_BOOTLOADER_PROJECT_VER=1 +# end of Bootloader manager + +# +# Application Rollback +# +# CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE is not set +# end of Application Rollback + +# +# Bootloader Rollback +# +# end of Bootloader Rollback + +CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x2000 +CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y +# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set +# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set + +# +# Log +# +CONFIG_BOOTLOADER_LOG_VERSION_1=y +CONFIG_BOOTLOADER_LOG_VERSION=1 +# CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set +# CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set +# CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set +CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y +# CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set +# CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set +CONFIG_BOOTLOADER_LOG_LEVEL=3 + +# +# Format +# +# CONFIG_BOOTLOADER_LOG_COLORS is not set +CONFIG_BOOTLOADER_LOG_TIMESTAMP_SOURCE_CPU_TICKS=y +# end of Format + +# +# Settings +# +CONFIG_BOOTLOADER_LOG_MODE_TEXT_EN=y +CONFIG_BOOTLOADER_LOG_MODE_TEXT=y +# end of Settings +# end of Log + +# +# Serial Flash Configurations +# +# CONFIG_BOOTLOADER_FLASH_DC_AWARE is not set +CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y +# end of Serial Flash Configurations + +# CONFIG_BOOTLOADER_FACTORY_RESET is not set +# CONFIG_BOOTLOADER_APP_TEST is not set +CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE=y +CONFIG_BOOTLOADER_WDT_ENABLE=y +# CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE is not set +CONFIG_BOOTLOADER_WDT_TIME_MS=9000 +# CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP is not set +# CONFIG_BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON is not set +# CONFIG_BOOTLOADER_SKIP_VALIDATE_ALWAYS is not set +CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0 +# CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set +# end of Bootloader config + +# +# Security features +# +CONFIG_SECURE_BOOT_V2_RSA_SUPPORTED=y +CONFIG_SECURE_BOOT_V2_ECC_SUPPORTED=y +CONFIG_SECURE_BOOT_V2_PREFERRED=y +# CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set +# CONFIG_SECURE_BOOT is not set +# CONFIG_SECURE_FLASH_ENC_ENABLED is not set +CONFIG_SECURE_ROM_DL_MODE_ENABLED=y +# end of Security features + +# +# Application manager +# +CONFIG_APP_COMPILE_TIME_DATE=y +# CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set +# CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set +# CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set +CONFIG_APP_RETRIEVE_LEN_ELF_SHA=9 +# end of Application manager + +CONFIG_ESP_ROM_HAS_CRC_LE=y +CONFIG_ESP_ROM_HAS_CRC_BE=y +CONFIG_ESP_ROM_UART_CLK_IS_XTAL=y +CONFIG_ESP_ROM_USB_SERIAL_DEVICE_NUM=6 +CONFIG_ESP_ROM_USB_OTG_NUM=5 +CONFIG_ESP_ROM_HAS_RETARGETABLE_LOCKING=y +CONFIG_ESP_ROM_GET_CLK_FREQ=y +CONFIG_ESP_ROM_HAS_RVFPLIB=y +CONFIG_ESP_ROM_HAS_HAL_WDT=y +CONFIG_ESP_ROM_HAS_HAL_SYSTIMER=y +CONFIG_ESP_ROM_HAS_LAYOUT_TABLE=y +CONFIG_ESP_ROM_WDT_INIT_PATCH=y +CONFIG_ESP_ROM_HAS_LP_ROM=y +CONFIG_ESP_ROM_WITHOUT_REGI2C=y +CONFIG_ESP_ROM_HAS_NEWLIB=y +CONFIG_ESP_ROM_HAS_NEWLIB_NANO_FORMAT=y +CONFIG_ESP_ROM_HAS_NEWLIB_NANO_PRINTF_FLOAT_BUG=y +CONFIG_ESP_ROM_HAS_VERSION=y +CONFIG_ESP_ROM_CLIC_INT_TYPE_PATCH=y +CONFIG_ESP_ROM_HAS_OUTPUT_PUTC_FUNC=y +CONFIG_ESP_ROM_HAS_SUBOPTIMAL_NEWLIB_ON_MISALIGNED_MEMORY=y + +# +# Boot ROM Behavior +# +CONFIG_BOOT_ROM_LOG_ALWAYS_ON=y +# CONFIG_BOOT_ROM_LOG_ALWAYS_OFF is not set +# CONFIG_BOOT_ROM_LOG_ON_GPIO_HIGH is not set +# CONFIG_BOOT_ROM_LOG_ON_GPIO_LOW is not set +# end of Boot ROM Behavior + +# +# Serial flasher config +# +# CONFIG_ESPTOOLPY_NO_STUB is not set +CONFIG_ESPTOOLPY_FLASHMODE_QIO=y +# CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set +# CONFIG_ESPTOOLPY_FLASHMODE_DIO is not set +# CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set +CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR=y +CONFIG_ESPTOOLPY_FLASHMODE="dio" +# CONFIG_ESPTOOLPY_FLASHFREQ_120M is not set +CONFIG_ESPTOOLPY_FLASHFREQ_80M=y +# CONFIG_ESPTOOLPY_FLASHFREQ_40M is not set +# CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set +CONFIG_ESPTOOLPY_FLASHFREQ_VAL=80 +CONFIG_ESPTOOLPY_FLASHFREQ="80m" +# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y +# CONFIG_ESPTOOLPY_FLASHSIZE_32MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_64MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_128MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE="16MB" +# CONFIG_ESPTOOLPY_HEADER_FLASHSIZE_UPDATE is not set +CONFIG_ESPTOOLPY_BEFORE_RESET=y +# CONFIG_ESPTOOLPY_BEFORE_NORESET is not set +CONFIG_ESPTOOLPY_BEFORE="default_reset" +CONFIG_ESPTOOLPY_AFTER_RESET=y +# CONFIG_ESPTOOLPY_AFTER_NORESET is not set +CONFIG_ESPTOOLPY_AFTER="hard_reset" +CONFIG_ESPTOOLPY_MONITOR_BAUD=115200 +# end of Serial flasher config + +# +# Partition Table +# +# CONFIG_PARTITION_TABLE_SINGLE_APP is not set +# CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE is not set +# CONFIG_PARTITION_TABLE_TWO_OTA is not set +# CONFIG_PARTITION_TABLE_TWO_OTA_LARGE is not set +CONFIG_PARTITION_TABLE_CUSTOM=y +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="../partitions.csv" +CONFIG_PARTITION_TABLE_FILENAME="../partitions.csv" +CONFIG_PARTITION_TABLE_OFFSET=0x8000 +CONFIG_PARTITION_TABLE_MD5=y +# end of Partition Table + +# +# Compiler options +# +# CONFIG_COMPILER_OPTIMIZATION_DEBUG is not set +CONFIG_COMPILER_OPTIMIZATION_SIZE=y +# CONFIG_COMPILER_OPTIMIZATION_PERF is not set +# CONFIG_COMPILER_OPTIMIZATION_NONE is not set +# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE is not set +CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y +# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE is not set +CONFIG_COMPILER_ASSERT_NDEBUG_EVALUATE=y +# CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB is not set +CONFIG_COMPILER_FLOAT_LIB_FROM_RVFPLIB=y +CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL=1 +# CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT is not set +CONFIG_COMPILER_HIDE_PATHS_MACROS=y +# CONFIG_COMPILER_CXX_EXCEPTIONS is not set +# CONFIG_COMPILER_CXX_RTTI is not set +CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y +# CONFIG_COMPILER_STACK_CHECK_MODE_NORM is not set +# CONFIG_COMPILER_STACK_CHECK_MODE_STRONG is not set +# CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set +# CONFIG_COMPILER_NO_MERGE_CONSTANTS is not set +# CONFIG_COMPILER_WARN_WRITE_STRINGS is not set +# CONFIG_COMPILER_SAVE_RESTORE_LIBCALLS is not set +CONFIG_COMPILER_DISABLE_DEFAULT_ERRORS=y +# CONFIG_COMPILER_DISABLE_GCC12_WARNINGS is not set +# CONFIG_COMPILER_DISABLE_GCC13_WARNINGS is not set +# CONFIG_COMPILER_DISABLE_GCC14_WARNINGS is not set +# CONFIG_COMPILER_DUMP_RTL_FILES is not set +CONFIG_COMPILER_RT_LIB_GCCLIB=y +CONFIG_COMPILER_RT_LIB_NAME="gcc" +# CONFIG_COMPILER_ORPHAN_SECTIONS_WARNING is not set +CONFIG_COMPILER_ORPHAN_SECTIONS_PLACE=y +# CONFIG_COMPILER_STATIC_ANALYZER is not set +# end of Compiler options + +# +# Component config +# + +# +# Driver Configurations +# + +# +# Legacy TWAI Driver Configurations +# +# CONFIG_TWAI_SKIP_LEGACY_CONFLICT_CHECK is not set +# end of Legacy TWAI Driver Configurations + +# +# Legacy ADC Driver Configuration +# +CONFIG_ADC_SUPPRESS_DEPRECATE_WARN=y +# CONFIG_ADC_SKIP_LEGACY_CONFLICT_CHECK is not set + +# +# Legacy ADC Calibration Configuration +# +# CONFIG_ADC_CALI_SUPPRESS_DEPRECATE_WARN is not set +# end of Legacy ADC Calibration Configuration +# end of Legacy ADC Driver Configuration + +# +# Legacy MCPWM Driver Configurations +# +# CONFIG_MCPWM_SUPPRESS_DEPRECATE_WARN is not set +# CONFIG_MCPWM_SKIP_LEGACY_CONFLICT_CHECK is not set +# end of Legacy MCPWM Driver Configurations + +# +# Legacy Timer Group Driver Configurations +# +# CONFIG_GPTIMER_SUPPRESS_DEPRECATE_WARN is not set +# CONFIG_GPTIMER_SKIP_LEGACY_CONFLICT_CHECK is not set +# end of Legacy Timer Group Driver Configurations + +# +# Legacy RMT Driver Configurations +# +# CONFIG_RMT_SUPPRESS_DEPRECATE_WARN is not set +# CONFIG_RMT_SKIP_LEGACY_CONFLICT_CHECK is not set +# end of Legacy RMT Driver Configurations + +# +# Legacy I2S Driver Configurations +# +CONFIG_I2S_SUPPRESS_DEPRECATE_WARN=y +# CONFIG_I2S_SKIP_LEGACY_CONFLICT_CHECK is not set +# end of Legacy I2S Driver Configurations + +# +# Legacy I2C Driver Configurations +# +# CONFIG_I2C_SKIP_LEGACY_CONFLICT_CHECK is not set +# end of Legacy I2C Driver Configurations + +# +# Legacy PCNT Driver Configurations +# +# CONFIG_PCNT_SUPPRESS_DEPRECATE_WARN is not set +# CONFIG_PCNT_SKIP_LEGACY_CONFLICT_CHECK is not set +# end of Legacy PCNT Driver Configurations + +# +# Legacy SDM Driver Configurations +# +# CONFIG_SDM_SUPPRESS_DEPRECATE_WARN is not set +# CONFIG_SDM_SKIP_LEGACY_CONFLICT_CHECK is not set +# end of Legacy SDM Driver Configurations + +# +# Legacy Temperature Sensor Driver Configurations +# +# CONFIG_TEMP_SENSOR_SUPPRESS_DEPRECATE_WARN is not set +# CONFIG_TEMP_SENSOR_SKIP_LEGACY_CONFLICT_CHECK is not set +# end of Legacy Temperature Sensor Driver Configurations + +# +# Legacy Touch Sensor Driver Configurations +# +# CONFIG_TOUCH_SUPPRESS_DEPRECATE_WARN is not set +# CONFIG_TOUCH_SKIP_LEGACY_CONFLICT_CHECK is not set +# end of Legacy Touch Sensor Driver Configurations +# end of Driver Configurations + +# +# eFuse Bit Manager +# +# CONFIG_EFUSE_CUSTOM_TABLE is not set +# CONFIG_EFUSE_VIRTUAL is not set +CONFIG_EFUSE_MAX_BLK_LEN=256 +# end of eFuse Bit Manager + +# +# ESP-TLS +# +CONFIG_ESP_TLS_USING_MBEDTLS=y +# CONFIG_ESP_TLS_USE_SECURE_ELEMENT is not set +CONFIG_ESP_TLS_USE_DS_PERIPHERAL=y +# CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS is not set +# CONFIG_ESP_TLS_SERVER_SESSION_TICKETS is not set +# CONFIG_ESP_TLS_SERVER_CERT_SELECT_HOOK is not set +# CONFIG_ESP_TLS_SERVER_MIN_AUTH_MODE_OPTIONAL is not set +# CONFIG_ESP_TLS_PSK_VERIFICATION is not set +CONFIG_ESP_TLS_INSECURE=y +CONFIG_ESP_TLS_SKIP_SERVER_CERT_VERIFY=y +# end of ESP-TLS + +# +# ADC and ADC Calibration +# +# CONFIG_ADC_ONESHOT_CTRL_FUNC_IN_IRAM is not set +# CONFIG_ADC_CONTINUOUS_ISR_IRAM_SAFE is not set +# CONFIG_ADC_ENABLE_DEBUG_LOG is not set +# end of ADC and ADC Calibration + +# +# Wireless Coexistence +# +# CONFIG_ESP_COEX_GPIO_DEBUG is not set +# end of Wireless Coexistence + +# +# Common ESP-related +# +CONFIG_ESP_ERR_TO_NAME_LOOKUP=y +CONFIG_ESP_ALLOW_BSS_SEG_EXTERNAL_MEMORY=y +# end of Common ESP-related + +# +# ESP-Driver:Analog Comparator Configurations +# +CONFIG_ANA_CMPR_ISR_HANDLER_IN_IRAM=y +# CONFIG_ANA_CMPR_CTRL_FUNC_IN_IRAM is not set +# CONFIG_ANA_CMPR_ISR_CACHE_SAFE is not set +CONFIG_ANA_CMPR_OBJ_CACHE_SAFE=y +# CONFIG_ANA_CMPR_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:Analog Comparator Configurations + +# +# BitScrambler Configurations +# +# CONFIG_BITSCRAMBLER_CTRL_FUNC_IN_IRAM is not set +# end of BitScrambler Configurations + +# +# ESP-Driver:GPIO Configurations +# +# CONFIG_GPIO_CTRL_FUNC_IN_IRAM is not set +# end of ESP-Driver:GPIO Configurations + +# +# ESP-Driver:GPTimer Configurations +# +CONFIG_GPTIMER_ISR_HANDLER_IN_IRAM=y +# CONFIG_GPTIMER_CTRL_FUNC_IN_IRAM is not set +# CONFIG_GPTIMER_ISR_CACHE_SAFE is not set +CONFIG_GPTIMER_OBJ_CACHE_SAFE=y +# CONFIG_GPTIMER_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:GPTimer Configurations + +# +# ESP-Driver:I2C Configurations +# +# CONFIG_I2C_ISR_IRAM_SAFE is not set +# CONFIG_I2C_ENABLE_DEBUG_LOG is not set +# CONFIG_I2C_ENABLE_SLAVE_DRIVER_VERSION_2 is not set +CONFIG_I2C_MASTER_ISR_HANDLER_IN_IRAM=y +# end of ESP-Driver:I2C Configurations + +# +# ESP-Driver:I2S Configurations +# +# CONFIG_I2S_ISR_IRAM_SAFE is not set +# CONFIG_I2S_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:I2S Configurations + +# +# ESP-Driver:LEDC Configurations +# +# CONFIG_LEDC_CTRL_FUNC_IN_IRAM is not set +# end of ESP-Driver:LEDC Configurations + +# +# ESP-Driver:MCPWM Configurations +# +CONFIG_MCPWM_ISR_HANDLER_IN_IRAM=y +# CONFIG_MCPWM_ISR_CACHE_SAFE is not set +# CONFIG_MCPWM_CTRL_FUNC_IN_IRAM is not set +CONFIG_MCPWM_OBJ_CACHE_SAFE=y +# CONFIG_MCPWM_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:MCPWM Configurations + +# +# ESP-Driver:Parallel IO Configurations +# +CONFIG_PARLIO_TX_ISR_HANDLER_IN_IRAM=y +CONFIG_PARLIO_RX_ISR_HANDLER_IN_IRAM=y +# CONFIG_PARLIO_TX_ISR_CACHE_SAFE is not set +# CONFIG_PARLIO_RX_ISR_CACHE_SAFE is not set +CONFIG_PARLIO_OBJ_CACHE_SAFE=y +# CONFIG_PARLIO_ENABLE_DEBUG_LOG is not set +# CONFIG_PARLIO_ISR_IRAM_SAFE is not set +# end of ESP-Driver:Parallel IO Configurations + +# +# ESP-Driver:PCNT Configurations +# +# CONFIG_PCNT_CTRL_FUNC_IN_IRAM is not set +# CONFIG_PCNT_ISR_IRAM_SAFE is not set +# CONFIG_PCNT_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:PCNT Configurations + +# +# ESP-Driver:RMT Configurations +# +CONFIG_RMT_ENCODER_FUNC_IN_IRAM=y +CONFIG_RMT_TX_ISR_HANDLER_IN_IRAM=y +CONFIG_RMT_RX_ISR_HANDLER_IN_IRAM=y +# CONFIG_RMT_RECV_FUNC_IN_IRAM is not set +# CONFIG_RMT_TX_ISR_CACHE_SAFE is not set +# CONFIG_RMT_RX_ISR_CACHE_SAFE is not set +CONFIG_RMT_OBJ_CACHE_SAFE=y +# CONFIG_RMT_ENABLE_DEBUG_LOG is not set +# CONFIG_RMT_ISR_IRAM_SAFE is not set +# end of ESP-Driver:RMT Configurations + +# +# ESP-Driver:Sigma Delta Modulator Configurations +# +# CONFIG_SDM_CTRL_FUNC_IN_IRAM is not set +# CONFIG_SDM_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:Sigma Delta Modulator Configurations + +# +# ESP-Driver:SPI Configurations +# +CONFIG_SPI_MASTER_IN_IRAM=y +CONFIG_SPI_MASTER_ISR_IN_IRAM=y +# CONFIG_SPI_SLAVE_IN_IRAM is not set +CONFIG_SPI_SLAVE_ISR_IN_IRAM=y +# end of ESP-Driver:SPI Configurations + +# +# ESP-Driver:Temperature Sensor Configurations +# +# CONFIG_TEMP_SENSOR_ENABLE_DEBUG_LOG is not set +# CONFIG_TEMP_SENSOR_ISR_IRAM_SAFE is not set +# end of ESP-Driver:Temperature Sensor Configurations + +# +# ESP-Driver:TWAI Configurations +# +# CONFIG_TWAI_ISR_IN_IRAM is not set +# CONFIG_TWAI_ISR_CACHE_SAFE is not set +# CONFIG_TWAI_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:TWAI Configurations + +# +# ESP-Driver:UART Configurations +# +# CONFIG_UART_ISR_IN_IRAM is not set +# end of ESP-Driver:UART Configurations + +# +# ESP-Driver:UHCI Configurations +# +# CONFIG_UHCI_ISR_HANDLER_IN_IRAM is not set +# CONFIG_UHCI_ISR_CACHE_SAFE is not set +# CONFIG_UHCI_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:UHCI Configurations + +# +# ESP-Driver:USB Serial/JTAG Configuration +# +CONFIG_USJ_ENABLE_USB_SERIAL_JTAG=y +# end of ESP-Driver:USB Serial/JTAG Configuration + +# +# Event Loop Library +# +# CONFIG_ESP_EVENT_LOOP_PROFILING is not set +CONFIG_ESP_EVENT_POST_FROM_ISR=y +CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=y +# end of Event Loop Library + +# +# ESP HTTP client +# +CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS=y +# CONFIG_ESP_HTTP_CLIENT_ENABLE_BASIC_AUTH is not set +# CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH is not set +# CONFIG_ESP_HTTP_CLIENT_ENABLE_CUSTOM_TRANSPORT is not set +CONFIG_ESP_HTTP_CLIENT_EVENT_POST_TIMEOUT=2000 +# end of ESP HTTP client + +# +# HTTP Server +# +CONFIG_HTTPD_MAX_REQ_HDR_LEN=1024 +CONFIG_HTTPD_MAX_URI_LEN=1024 +CONFIG_HTTPD_ERR_RESP_NO_DELAY=y +CONFIG_HTTPD_PURGE_BUF_LEN=32 +# CONFIG_HTTPD_LOG_PURGE_DATA is not set +# CONFIG_HTTPD_WS_SUPPORT is not set +# CONFIG_HTTPD_QUEUE_WORK_BLOCKING is not set +CONFIG_HTTPD_SERVER_EVENT_POST_TIMEOUT=2000 +# end of HTTP Server + +# +# Hardware Settings +# + +# +# Chip revision +# +# CONFIG_ESP32P4_REV_MIN_0 is not set +CONFIG_ESP32P4_REV_MIN_1=y +# CONFIG_ESP32P4_REV_MIN_100 is not set +CONFIG_ESP32P4_REV_MIN_FULL=1 +CONFIG_ESP_REV_MIN_FULL=1 + +# +# Maximum Supported ESP32-P4 Revision (Rev v1.99) +# +CONFIG_ESP32P4_REV_MAX_FULL=199 +CONFIG_ESP_REV_MAX_FULL=199 +CONFIG_ESP_EFUSE_BLOCK_REV_MIN_FULL=0 +CONFIG_ESP_EFUSE_BLOCK_REV_MAX_FULL=99 + +# +# Maximum Supported ESP32-P4 eFuse Block Revision (eFuse Block Rev v0.99) +# +# end of Chip revision + +# +# MAC Config +# +CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y +CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES_ONE=y +CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES=1 +CONFIG_ESP32P4_UNIVERSAL_MAC_ADDRESSES_ONE=y +CONFIG_ESP32P4_UNIVERSAL_MAC_ADDRESSES=1 +# CONFIG_ESP_MAC_USE_CUSTOM_MAC_AS_BASE_MAC is not set +# end of MAC Config + +# +# Sleep Config +# +CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND=y +CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND=y +# CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU is not set +# CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND is not set +CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY=0 +# CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION is not set +# CONFIG_ESP_SLEEP_DEBUG is not set +CONFIG_ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS=y +# end of Sleep Config + +# +# RTC Clock Config +# +CONFIG_RTC_CLK_SRC_INT_RC=y +# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set +CONFIG_RTC_CLK_CAL_CYCLES=1024 +CONFIG_RTC_FAST_CLK_SRC_RC_FAST=y +# CONFIG_RTC_FAST_CLK_SRC_XTAL is not set +# end of RTC Clock Config + +# +# Peripheral Control +# +CONFIG_ESP_PERIPH_CTRL_FUNC_IN_IRAM=y +CONFIG_ESP_REGI2C_CTRL_FUNC_IN_IRAM=y +# end of Peripheral Control + +# +# ETM Configuration +# +# CONFIG_ETM_ENABLE_DEBUG_LOG is not set +# end of ETM Configuration + +# +# GDMA Configurations +# +CONFIG_GDMA_CTRL_FUNC_IN_IRAM=y +CONFIG_GDMA_ISR_HANDLER_IN_IRAM=y +CONFIG_GDMA_OBJ_DRAM_SAFE=y +# CONFIG_GDMA_ENABLE_DEBUG_LOG is not set +# CONFIG_GDMA_ISR_IRAM_SAFE is not set +# end of GDMA Configurations + +# +# DW_GDMA Configurations +# +# CONFIG_DW_GDMA_ENABLE_DEBUG_LOG is not set +# end of DW_GDMA Configurations + +# +# 2D-DMA Configurations +# +# CONFIG_DMA2D_OPERATION_FUNC_IN_IRAM is not set +# CONFIG_DMA2D_ISR_IRAM_SAFE is not set +# end of 2D-DMA Configurations + +# +# Main XTAL Config +# +CONFIG_XTAL_FREQ_40=y +CONFIG_XTAL_FREQ=40 +# end of Main XTAL Config + +# +# DCDC Regulator Configurations +# +CONFIG_ESP_SLEEP_KEEP_DCDC_ALWAYS_ON=y +CONFIG_ESP_SLEEP_DCM_VSET_VAL_IN_SLEEP=14 +# end of DCDC Regulator Configurations + +# +# LDO Regulator Configurations +# +CONFIG_ESP_LDO_RESERVE_SPI_NOR_FLASH=y +CONFIG_ESP_LDO_CHAN_SPI_NOR_FLASH_DOMAIN=1 +CONFIG_ESP_LDO_VOLTAGE_SPI_NOR_FLASH_3300_MV=y +CONFIG_ESP_LDO_VOLTAGE_SPI_NOR_FLASH_DOMAIN=3300 +CONFIG_ESP_LDO_RESERVE_PSRAM=y +CONFIG_ESP_LDO_CHAN_PSRAM_DOMAIN=2 +CONFIG_ESP_LDO_VOLTAGE_PSRAM_1900_MV=y +CONFIG_ESP_LDO_VOLTAGE_PSRAM_DOMAIN=1900 +# end of LDO Regulator Configurations + +# +# Power Supplier +# + +# +# Brownout Detector +# +CONFIG_ESP_BROWNOUT_DET=y +CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7=y +# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_6 is not set +# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_5 is not set +CONFIG_ESP_BROWNOUT_DET_LVL=7 +CONFIG_ESP_BROWNOUT_USE_INTR=y +# end of Brownout Detector + +# +# RTC Backup Battery +# +# CONFIG_ESP_VBAT_INIT_AUTO is not set +# CONFIG_ESP_VBAT_WAKEUP_CHIP_ON_VBAT_BROWNOUT is not set +# end of RTC Backup Battery +# end of Power Supplier + +CONFIG_ESP_SPI_BUS_LOCK_ISR_FUNCS_IN_IRAM=y +CONFIG_ESP_SPI_BUS_LOCK_FUNCS_IN_IRAM=y +CONFIG_ESP_INTR_IN_IRAM=y +# end of Hardware Settings + +# +# ESP-MM: Memory Management Configurations +# +# CONFIG_ESP_MM_CACHE_MSYNC_C2M_CHUNKED_OPS is not set +# end of ESP-MM: Memory Management Configurations + +# +# ESP NETIF Adapter +# +CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120 +# CONFIG_ESP_NETIF_PROVIDE_CUSTOM_IMPLEMENTATION is not set +CONFIG_ESP_NETIF_TCPIP_LWIP=y +# CONFIG_ESP_NETIF_LOOPBACK is not set +CONFIG_ESP_NETIF_USES_TCPIP_WITH_BSD_API=y +CONFIG_ESP_NETIF_REPORT_DATA_TRAFFIC=y +# CONFIG_ESP_NETIF_RECEIVE_REPORT_ERRORS is not set +# CONFIG_ESP_NETIF_L2_TAP is not set +# CONFIG_ESP_NETIF_BRIDGE_EN is not set +# CONFIG_ESP_NETIF_SET_DNS_PER_DEFAULT_NETIF is not set +# end of ESP NETIF Adapter + +# +# Partition API Configuration +# +# end of Partition API Configuration + +# +# PHY +# +# end of PHY + +# +# Power Management +# +CONFIG_PM_SLEEP_FUNC_IN_IRAM=y +# CONFIG_PM_ENABLE is not set +CONFIG_PM_SLP_IRAM_OPT=y +# CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP is not set +# end of Power Management + +# +# ESP PSRAM +# +CONFIG_SPIRAM=y + +# +# PSRAM config +# +CONFIG_SPIRAM_MODE_HEX=y +CONFIG_SPIRAM_SPEED_200M=y +# CONFIG_SPIRAM_SPEED_80M is not set +# CONFIG_SPIRAM_SPEED_20M is not set +CONFIG_SPIRAM_SPEED=200 +# CONFIG_SPIRAM_XIP_FROM_PSRAM is not set +# CONFIG_SPIRAM_ECC_ENABLE is not set +CONFIG_SPIRAM_BOOT_HW_INIT=y +CONFIG_SPIRAM_BOOT_INIT=y +CONFIG_SPIRAM_PRE_CONFIGURE_MEMORY_PROTECTION=y +# CONFIG_SPIRAM_USE_MEMMAP is not set +# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set +CONFIG_SPIRAM_USE_MALLOC=y +CONFIG_SPIRAM_MEMTEST=y +CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=32768 +# CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP is not set +CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL=32768 +CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY=y +# CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY is not set +# end of PSRAM config +# end of ESP PSRAM + +# +# ESP Ringbuf +# +# CONFIG_RINGBUF_PLACE_FUNCTIONS_INTO_FLASH is not set +# end of ESP Ringbuf + +# +# ESP-ROM +# +CONFIG_ESP_ROM_PRINT_IN_IRAM=y +# end of ESP-ROM + +# +# ESP Security Specific +# +# end of ESP Security Specific + +# +# ESP System Settings +# +CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_360=y +CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=360 + +# +# Cache config +# +CONFIG_CACHE_L2_CACHE_128KB=y +# CONFIG_CACHE_L2_CACHE_256KB is not set +# CONFIG_CACHE_L2_CACHE_512KB is not set +CONFIG_CACHE_L2_CACHE_SIZE=0x20000 +CONFIG_CACHE_L2_CACHE_LINE_64B=y +# CONFIG_CACHE_L2_CACHE_LINE_128B is not set +CONFIG_CACHE_L2_CACHE_LINE_SIZE=64 +CONFIG_CACHE_L1_CACHE_LINE_SIZE=64 +# end of Cache config + +# CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set +CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y +# CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set +CONFIG_ESP_SYSTEM_PANIC_REBOOT_DELAY_SECONDS=0 +CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y +CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y +CONFIG_ESP_SYSTEM_NO_BACKTRACE=y +# CONFIG_ESP_SYSTEM_USE_EH_FRAME is not set +# CONFIG_ESP_SYSTEM_USE_FRAME_POINTER is not set + +# +# Memory protection +# +CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT=y +# CONFIG_ESP_SYSTEM_PMP_LP_CORE_RESERVE_MEM_EXECUTABLE is not set +# end of Memory protection + +CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32 +CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304 +CONFIG_ESP_MAIN_TASK_STACK_SIZE=8192 +CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0=y +# CONFIG_ESP_MAIN_TASK_AFFINITY_CPU1 is not set +# CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY is not set +CONFIG_ESP_MAIN_TASK_AFFINITY=0x0 +CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048 +CONFIG_ESP_CONSOLE_UART_DEFAULT=y +# CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG is not set +# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set +# CONFIG_ESP_CONSOLE_NONE is not set +# CONFIG_ESP_CONSOLE_SECONDARY_NONE is not set +CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG=y +CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG_ENABLED=y +CONFIG_ESP_CONSOLE_UART=y +CONFIG_ESP_CONSOLE_UART_NUM=0 +CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM=0 +CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 +CONFIG_ESP_INT_WDT=y +CONFIG_ESP_INT_WDT_TIMEOUT_MS=300 +CONFIG_ESP_INT_WDT_CHECK_CPU1=y +CONFIG_ESP_TASK_WDT_EN=y +# CONFIG_ESP_TASK_WDT_INIT is not set +# CONFIG_ESP_PANIC_HANDLER_IRAM is not set +# CONFIG_ESP_DEBUG_STUBS_ENABLE is not set +# CONFIG_ESP_DEBUG_OCDAWARE is not set +CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4=y +CONFIG_ESP_SYSTEM_HW_STACK_GUARD=y +CONFIG_ESP_SYSTEM_HW_PC_RECORD=y +# end of ESP System Settings + +# +# IPC (Inter-Processor Call) +# +CONFIG_ESP_IPC_TASK_STACK_SIZE=1024 +CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y +CONFIG_ESP_IPC_ISR_ENABLE=y +# end of IPC (Inter-Processor Call) + +# +# ESP Timer (High Resolution Timer) +# +CONFIG_ESP_TIMER_IN_IRAM=y +# CONFIG_ESP_TIMER_PROFILING is not set +CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER=y +CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER=y +CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584 +CONFIG_ESP_TIMER_INTERRUPT_LEVEL=1 +# CONFIG_ESP_TIMER_SHOW_EXPERIMENTAL is not set +CONFIG_ESP_TIMER_TASK_AFFINITY=0x0 +CONFIG_ESP_TIMER_TASK_AFFINITY_CPU0=y +CONFIG_ESP_TIMER_ISR_AFFINITY_CPU0=y +# CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD is not set +CONFIG_ESP_TIMER_IMPL_SYSTIMER=y +# end of ESP Timer (High Resolution Timer) + +# +# Wi-Fi +# +# CONFIG_ESP_HOST_WIFI_ENABLED is not set +# end of Wi-Fi + +# +# FAT Filesystem support +# +CONFIG_FATFS_VOLUME_COUNT=2 +# CONFIG_FATFS_LFN_NONE is not set +CONFIG_FATFS_LFN_HEAP=y +# CONFIG_FATFS_LFN_STACK is not set +# CONFIG_FATFS_SECTOR_512 is not set +CONFIG_FATFS_SECTOR_4096=y +# CONFIG_FATFS_CODEPAGE_DYNAMIC is not set +CONFIG_FATFS_CODEPAGE_437=y +# CONFIG_FATFS_CODEPAGE_720 is not set +# CONFIG_FATFS_CODEPAGE_737 is not set +# CONFIG_FATFS_CODEPAGE_771 is not set +# CONFIG_FATFS_CODEPAGE_775 is not set +# CONFIG_FATFS_CODEPAGE_850 is not set +# CONFIG_FATFS_CODEPAGE_852 is not set +# CONFIG_FATFS_CODEPAGE_855 is not set +# CONFIG_FATFS_CODEPAGE_857 is not set +# CONFIG_FATFS_CODEPAGE_860 is not set +# CONFIG_FATFS_CODEPAGE_861 is not set +# CONFIG_FATFS_CODEPAGE_862 is not set +# CONFIG_FATFS_CODEPAGE_863 is not set +# CONFIG_FATFS_CODEPAGE_864 is not set +# CONFIG_FATFS_CODEPAGE_865 is not set +# CONFIG_FATFS_CODEPAGE_866 is not set +# CONFIG_FATFS_CODEPAGE_869 is not set +# CONFIG_FATFS_CODEPAGE_932 is not set +# CONFIG_FATFS_CODEPAGE_936 is not set +# CONFIG_FATFS_CODEPAGE_949 is not set +# CONFIG_FATFS_CODEPAGE_950 is not set +CONFIG_FATFS_CODEPAGE=437 +CONFIG_FATFS_MAX_LFN=255 +CONFIG_FATFS_API_ENCODING_ANSI_OEM=n +CONFIG_FATFS_API_ENCODING_UTF_16=n +CONFIG_FATFS_API_ENCODING_UTF_8=y +CONFIG_FATFS_FS_LOCK=0 +CONFIG_FATFS_TIMEOUT_MS=10000 +CONFIG_FATFS_PER_FILE_CACHE=y +CONFIG_FATFS_ALLOC_PREFER_EXTRAM=y +CONFIG_FATFS_USE_FASTSEEK=y +CONFIG_FATFS_USE_STRFUNC_NONE=y +# CONFIG_FATFS_USE_STRFUNC_WITHOUT_CRLF_CONV is not set +# CONFIG_FATFS_USE_STRFUNC_WITH_CRLF_CONV is not set +CONFIG_FATFS_FAST_SEEK_BUFFER_SIZE=64 +CONFIG_FATFS_VFS_FSTAT_BLKSIZE=0 +# CONFIG_FATFS_IMMEDIATE_FSYNC is not set +# CONFIG_FATFS_USE_LABEL is not set +CONFIG_FATFS_LINK_LOCK=y +# CONFIG_FATFS_USE_DYN_BUFFERS is not set + +# +# File system free space calculation behavior +# +CONFIG_FATFS_DONT_TRUST_FREE_CLUSTER_CNT=0 +CONFIG_FATFS_DONT_TRUST_LAST_ALLOC=0 +# end of File system free space calculation behavior +# end of FAT Filesystem support + +# +# FreeRTOS +# + +# +# Kernel +# +# CONFIG_FREERTOS_UNICORE is not set +CONFIG_FREERTOS_HZ=100 +# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set +CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL=y +# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY is not set +CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1 +CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1024 +# CONFIG_FREERTOS_USE_IDLE_HOOK is not set +# CONFIG_FREERTOS_USE_TICK_HOOK is not set +CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16 +# CONFIG_FREERTOS_ENABLE_BACKWARD_COMPATIBILITY is not set +CONFIG_FREERTOS_USE_TIMERS=y +CONFIG_FREERTOS_TIMER_SERVICE_TASK_NAME="Tmr Svc" +# CONFIG_FREERTOS_TIMER_TASK_AFFINITY_CPU0 is not set +# CONFIG_FREERTOS_TIMER_TASK_AFFINITY_CPU1 is not set +CONFIG_FREERTOS_TIMER_TASK_NO_AFFINITY=y +CONFIG_FREERTOS_TIMER_SERVICE_TASK_CORE_AFFINITY=0x7FFFFFFF +CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1 +CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=2048 +CONFIG_FREERTOS_TIMER_QUEUE_LENGTH=10 +CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0 +CONFIG_FREERTOS_TASK_NOTIFICATION_ARRAY_ENTRIES=1 +# CONFIG_FREERTOS_USE_TRACE_FACILITY is not set +# CONFIG_FREERTOS_USE_LIST_DATA_INTEGRITY_CHECK_BYTES is not set +# CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set +# CONFIG_FREERTOS_USE_APPLICATION_TASK_TAG is not set +# end of Kernel + +# +# Port +# +# CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK is not set +CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS=y +# CONFIG_FREERTOS_TASK_PRE_DELETION_HOOK is not set +# CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP is not set +# CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER is not set +CONFIG_FREERTOS_ISR_STACKSIZE=1536 +CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y +CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER=y +CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1=y +# CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL3 is not set +CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER=y +# CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set +# CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set +# end of Port + +# +# Extra +# +CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM=y +# end of Extra + +CONFIG_FREERTOS_PORT=y +CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF +CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y +CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT=y +CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH=y +CONFIG_FREERTOS_NUMBER_OF_CORES=2 +CONFIG_FREERTOS_IN_IRAM=y +# end of FreeRTOS + +# +# Hardware Abstraction Layer (HAL) and Low Level (LL) +# +CONFIG_HAL_ASSERTION_EQUALS_SYSTEM=y +# CONFIG_HAL_ASSERTION_DISABLE is not set +# CONFIG_HAL_ASSERTION_SILENT is not set +CONFIG_HAL_DEFAULT_ASSERTION_LEVEL=1 +CONFIG_HAL_SYSTIMER_USE_ROM_IMPL=y +CONFIG_HAL_WDT_USE_ROM_IMPL=y +# end of Hardware Abstraction Layer (HAL) and Low Level (LL) + +# +# Heap memory debugging +# +CONFIG_HEAP_POISONING_DISABLED=y +# CONFIG_HEAP_POISONING_LIGHT is not set +# CONFIG_HEAP_POISONING_COMPREHENSIVE is not set +CONFIG_HEAP_TRACING_OFF=y +# CONFIG_HEAP_TRACING_STANDALONE is not set +# CONFIG_HEAP_TRACING_TOHOST is not set +# CONFIG_HEAP_USE_HOOKS is not set +# CONFIG_HEAP_TASK_TRACKING is not set +# CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS is not set +# CONFIG_HEAP_PLACE_FUNCTION_INTO_FLASH is not set +# end of Heap memory debugging + +# +# Log +# +CONFIG_LOG_VERSION_1=y +# CONFIG_LOG_VERSION_2 is not set +CONFIG_LOG_VERSION=1 + +# +# Log Level +# +# CONFIG_LOG_DEFAULT_LEVEL_NONE is not set +# CONFIG_LOG_DEFAULT_LEVEL_ERROR is not set +CONFIG_LOG_DEFAULT_LEVEL_WARN=y +# CONFIG_LOG_DEFAULT_LEVEL_INFO is not set +# CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set +# CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set +CONFIG_LOG_DEFAULT_LEVEL=2 +CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT=y +# CONFIG_LOG_MAXIMUM_LEVEL_INFO is not set +# CONFIG_LOG_MAXIMUM_LEVEL_DEBUG is not set +# CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE is not set +CONFIG_LOG_MAXIMUM_LEVEL=2 + +# +# Level Settings +# +# CONFIG_LOG_MASTER_LEVEL is not set +CONFIG_LOG_DYNAMIC_LEVEL_CONTROL=y +# CONFIG_LOG_TAG_LEVEL_IMPL_NONE is not set +# CONFIG_LOG_TAG_LEVEL_IMPL_LINKED_LIST is not set +CONFIG_LOG_TAG_LEVEL_IMPL_CACHE_AND_LINKED_LIST=y +# CONFIG_LOG_TAG_LEVEL_CACHE_ARRAY is not set +CONFIG_LOG_TAG_LEVEL_CACHE_BINARY_MIN_HEAP=y +CONFIG_LOG_TAG_LEVEL_IMPL_CACHE_SIZE=31 +# end of Level Settings +# end of Log Level + +# +# Format +# +CONFIG_LOG_COLORS=y +CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y +# CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set +# end of Format + +# +# Settings +# +CONFIG_LOG_MODE_TEXT_EN=y +CONFIG_LOG_MODE_TEXT=y +# end of Settings + +CONFIG_LOG_IN_IRAM=y +# end of Log + +# +# LWIP +# +CONFIG_LWIP_ENABLE=y +CONFIG_LWIP_LOCAL_HOSTNAME="espressif" +CONFIG_LWIP_TCPIP_TASK_PRIO=18 +# CONFIG_LWIP_TCPIP_CORE_LOCKING is not set +# CONFIG_LWIP_CHECK_THREAD_SAFETY is not set +CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y +# CONFIG_LWIP_L2_TO_L3_COPY is not set +# CONFIG_LWIP_IRAM_OPTIMIZATION is not set +# CONFIG_LWIP_EXTRA_IRAM_OPTIMIZATION is not set +CONFIG_LWIP_TIMERS_ONDEMAND=y +CONFIG_LWIP_MAX_SOCKETS=10 +# CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set +# CONFIG_LWIP_SO_LINGER is not set +CONFIG_LWIP_SO_REUSE=y +CONFIG_LWIP_SO_REUSE_RXTOALL=y +# CONFIG_LWIP_SO_RCVBUF is not set +# CONFIG_LWIP_NETBUF_RECVINFO is not set +CONFIG_LWIP_IP_DEFAULT_TTL=64 +CONFIG_LWIP_IP4_FRAG=y +# CONFIG_LWIP_IP4_REASSEMBLY is not set +CONFIG_LWIP_IP_REASS_MAX_PBUFS=10 +# CONFIG_LWIP_IP_FORWARD is not set +# CONFIG_LWIP_STATS is not set +CONFIG_LWIP_ESP_GRATUITOUS_ARP=y +CONFIG_LWIP_GARP_TMR_INTERVAL=60 +CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32 +CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y +# CONFIG_LWIP_DHCP_DOES_ACD_CHECK is not set +# CONFIG_LWIP_DHCP_DOES_NOT_CHECK_OFFERED_IP is not set +# CONFIG_LWIP_DHCP_DISABLE_CLIENT_ID is not set +CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID=y +# CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set +CONFIG_LWIP_DHCP_OPTIONS_LEN=68 +CONFIG_LWIP_NUM_NETIF_CLIENT_DATA=0 +CONFIG_LWIP_DHCP_COARSE_TIMER_SECS=1 + +# +# DHCP server +# +CONFIG_LWIP_DHCPS=y +CONFIG_LWIP_DHCPS_LEASE_UNIT=60 +CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8 +CONFIG_LWIP_DHCPS_STATIC_ENTRIES=y +CONFIG_LWIP_DHCPS_ADD_DNS=y +# end of DHCP server + +# CONFIG_LWIP_AUTOIP is not set +CONFIG_LWIP_IPV4=y +# CONFIG_LWIP_IPV6 is not set +# CONFIG_LWIP_NETIF_STATUS_CALLBACK is not set +CONFIG_LWIP_NETIF_LOOPBACK=y +CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8 + +# +# TCP +# +CONFIG_LWIP_MAX_ACTIVE_TCP=16 +CONFIG_LWIP_MAX_LISTENING_TCP=16 +CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION=y +CONFIG_LWIP_TCP_MAXRTX=12 +CONFIG_LWIP_TCP_SYNMAXRTX=12 +CONFIG_LWIP_TCP_MSS=1440 +CONFIG_LWIP_TCP_TMR_INTERVAL=250 +CONFIG_LWIP_TCP_MSL=60000 +CONFIG_LWIP_TCP_FIN_WAIT_TIMEOUT=20000 +CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5760 +CONFIG_LWIP_TCP_WND_DEFAULT=5760 +CONFIG_LWIP_TCP_RECVMBOX_SIZE=6 +CONFIG_LWIP_TCP_ACCEPTMBOX_SIZE=6 +CONFIG_LWIP_TCP_QUEUE_OOSEQ=y +CONFIG_LWIP_TCP_OOSEQ_TIMEOUT=6 +CONFIG_LWIP_TCP_OOSEQ_MAX_PBUFS=4 +# CONFIG_LWIP_TCP_SACK_OUT is not set +CONFIG_LWIP_TCP_OVERSIZE_MSS=y +# CONFIG_LWIP_TCP_OVERSIZE_QUARTER_MSS is not set +# CONFIG_LWIP_TCP_OVERSIZE_DISABLE is not set +CONFIG_LWIP_TCP_RTO_TIME=1500 +# end of TCP + +# +# UDP +# +CONFIG_LWIP_MAX_UDP_PCBS=16 +CONFIG_LWIP_UDP_RECVMBOX_SIZE=6 +# end of UDP + +# +# Checksums +# +# CONFIG_LWIP_CHECKSUM_CHECK_IP is not set +# CONFIG_LWIP_CHECKSUM_CHECK_UDP is not set +CONFIG_LWIP_CHECKSUM_CHECK_ICMP=y +# end of Checksums + +CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072 +CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y +# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set +# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU1 is not set +CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF +# CONFIG_LWIP_PPP_SUPPORT is not set +# CONFIG_LWIP_SLIP_SUPPORT is not set + +# +# ICMP +# +CONFIG_LWIP_ICMP=y +# CONFIG_LWIP_MULTICAST_PING is not set +# CONFIG_LWIP_BROADCAST_PING is not set +# end of ICMP + +# +# LWIP RAW API +# +CONFIG_LWIP_MAX_RAW_PCBS=16 +# end of LWIP RAW API + +# +# SNTP +# +CONFIG_LWIP_SNTP_MAX_SERVERS=1 +# CONFIG_LWIP_DHCP_GET_NTP_SRV is not set +CONFIG_LWIP_SNTP_UPDATE_DELAY=3600000 +CONFIG_LWIP_SNTP_STARTUP_DELAY=y +CONFIG_LWIP_SNTP_MAXIMUM_STARTUP_DELAY=5000 +# end of SNTP + +# +# DNS +# +CONFIG_LWIP_DNS_MAX_HOST_IP=1 +CONFIG_LWIP_DNS_MAX_SERVERS=3 +# CONFIG_LWIP_FALLBACK_DNS_SERVER_SUPPORT is not set +# CONFIG_LWIP_DNS_SETSERVER_WITH_NETIF is not set +# end of DNS + +CONFIG_LWIP_BRIDGEIF_MAX_PORTS=7 +CONFIG_LWIP_ESP_LWIP_ASSERT=y + +# +# Hooks +# +# CONFIG_LWIP_HOOK_TCP_ISN_NONE is not set +CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT=y +# CONFIG_LWIP_HOOK_TCP_ISN_CUSTOM is not set +CONFIG_LWIP_HOOK_DHCP_EXTRA_OPTION_NONE=y +# CONFIG_LWIP_HOOK_DHCP_EXTRA_OPTION_DEFAULT is not set +# CONFIG_LWIP_HOOK_DHCP_EXTRA_OPTION_CUSTOM is not set +CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE=y +# CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_DEFAULT is not set +# CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_CUSTOM is not set +CONFIG_LWIP_HOOK_DNS_EXT_RESOLVE_NONE=y +# CONFIG_LWIP_HOOK_DNS_EXT_RESOLVE_CUSTOM is not set +# end of Hooks + +# CONFIG_LWIP_DEBUG is not set +# end of LWIP + +# +# mbedTLS +# +CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y +# CONFIG_MBEDTLS_EXTERNAL_MEM_ALLOC is not set +# CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC is not set +# CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set +CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y +CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384 +CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096 +# CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set +# CONFIG_MBEDTLS_DEBUG is not set + +# +# mbedTLS v3.x related +# +# CONFIG_MBEDTLS_SSL_PROTO_TLS1_3 is not set +# CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH is not set +# CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK is not set +# CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION is not set +CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE=y +CONFIG_MBEDTLS_PKCS7_C=y +# end of mbedTLS v3.x related + +# +# Certificate Bundle +# +CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y +CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y +# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN is not set +# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE is not set +# CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE is not set +# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEPRECATED_LIST is not set +CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_MAX_CERTS=200 +# end of Certificate Bundle + +# CONFIG_MBEDTLS_ECP_RESTARTABLE is not set +# CONFIG_MBEDTLS_CMAC_C is not set +CONFIG_MBEDTLS_HARDWARE_AES=y +CONFIG_MBEDTLS_AES_USE_INTERRUPT=y +CONFIG_MBEDTLS_AES_INTERRUPT_LEVEL=0 +CONFIG_MBEDTLS_HARDWARE_GCM=y +CONFIG_MBEDTLS_GCM_SUPPORT_NON_AES_CIPHER=y +CONFIG_MBEDTLS_HARDWARE_MPI=y +# CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI is not set +CONFIG_MBEDTLS_MPI_USE_INTERRUPT=y +CONFIG_MBEDTLS_MPI_INTERRUPT_LEVEL=0 +CONFIG_MBEDTLS_HARDWARE_SHA=y +CONFIG_MBEDTLS_HARDWARE_ECC=y +CONFIG_MBEDTLS_ECC_OTHER_CURVES_SOFT_FALLBACK=y +CONFIG_MBEDTLS_ROM_MD5=y +# CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set +# CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set +CONFIG_MBEDTLS_HAVE_TIME=y +# CONFIG_MBEDTLS_PLATFORM_TIME_ALT is not set +# CONFIG_MBEDTLS_HAVE_TIME_DATE is not set +CONFIG_MBEDTLS_ECDSA_DETERMINISTIC=y +CONFIG_MBEDTLS_SHA1_C=y +CONFIG_MBEDTLS_SHA512_C=y +# CONFIG_MBEDTLS_SHA3_C is not set +CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y +# CONFIG_MBEDTLS_TLS_SERVER_ONLY is not set +# CONFIG_MBEDTLS_TLS_CLIENT_ONLY is not set +# CONFIG_MBEDTLS_TLS_DISABLED is not set +CONFIG_MBEDTLS_TLS_SERVER=y +CONFIG_MBEDTLS_TLS_CLIENT=y +CONFIG_MBEDTLS_TLS_ENABLED=y + +# +# TLS Key Exchange Methods +# +# CONFIG_MBEDTLS_PSK_MODES is not set +CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y +CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y +CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y +CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y +CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA=y +CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA=y +# end of TLS Key Exchange Methods + +CONFIG_MBEDTLS_SSL_RENEGOTIATION=y +CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y +# CONFIG_MBEDTLS_SSL_PROTO_GMTSSL1_1 is not set +# CONFIG_MBEDTLS_SSL_PROTO_DTLS is not set +CONFIG_MBEDTLS_SSL_ALPN=y +CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y +CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y + +# +# Symmetric Ciphers +# +CONFIG_MBEDTLS_AES_C=y +# CONFIG_MBEDTLS_CAMELLIA_C is not set +# CONFIG_MBEDTLS_DES_C is not set +# CONFIG_MBEDTLS_BLOWFISH_C is not set +# CONFIG_MBEDTLS_XTEA_C is not set +CONFIG_MBEDTLS_CCM_C=y +CONFIG_MBEDTLS_GCM_C=y +# CONFIG_MBEDTLS_NIST_KW_C is not set +# end of Symmetric Ciphers + +# CONFIG_MBEDTLS_RIPEMD160_C is not set + +# +# Certificates +# +CONFIG_MBEDTLS_PEM_PARSE_C=y +CONFIG_MBEDTLS_PEM_WRITE_C=y +CONFIG_MBEDTLS_X509_CRL_PARSE_C=y +CONFIG_MBEDTLS_X509_CSR_PARSE_C=y +# end of Certificates + +CONFIG_MBEDTLS_ECP_C=y +CONFIG_MBEDTLS_PK_PARSE_EC_EXTENDED=y +CONFIG_MBEDTLS_PK_PARSE_EC_COMPRESSED=y +# CONFIG_MBEDTLS_DHM_C is not set +CONFIG_MBEDTLS_ECDH_C=y +CONFIG_MBEDTLS_ECDSA_C=y +# CONFIG_MBEDTLS_ECJPAKE_C is not set +CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y +CONFIG_MBEDTLS_ECP_NIST_OPTIM=y +CONFIG_MBEDTLS_ECP_FIXED_POINT_OPTIM=y +# CONFIG_MBEDTLS_POLY1305_C is not set +# CONFIG_MBEDTLS_CHACHA20_C is not set +# CONFIG_MBEDTLS_HKDF_C is not set +# CONFIG_MBEDTLS_THREADING_C is not set +CONFIG_MBEDTLS_ERROR_STRINGS=y +CONFIG_MBEDTLS_FS_IO=y +# CONFIG_MBEDTLS_ALLOW_WEAK_CERTIFICATE_VERIFICATION is not set +# end of mbedTLS + +# +# LibC +# +CONFIG_LIBC_NEWLIB=y +# CONFIG_LIBC_PICOLIBC is not set +CONFIG_LIBC_MISC_IN_IRAM=y +CONFIG_LIBC_LOCKS_PLACE_IN_IRAM=y +CONFIG_LIBC_STDOUT_LINE_ENDING_CRLF=y +# CONFIG_LIBC_STDOUT_LINE_ENDING_LF is not set +# CONFIG_LIBC_STDOUT_LINE_ENDING_CR is not set +# CONFIG_LIBC_STDIN_LINE_ENDING_CRLF is not set +# CONFIG_LIBC_STDIN_LINE_ENDING_LF is not set +CONFIG_LIBC_STDIN_LINE_ENDING_CR=y +CONFIG_LIBC_NEWLIB_NANO_FORMAT=y +CONFIG_LIBC_TIME_SYSCALL_USE_RTC_HRT=y +# CONFIG_LIBC_TIME_SYSCALL_USE_RTC is not set +# CONFIG_LIBC_TIME_SYSCALL_USE_HRT is not set +# CONFIG_LIBC_TIME_SYSCALL_USE_NONE is not set +# CONFIG_LIBC_OPTIMIZED_MISALIGNED_ACCESS is not set +# end of LibC + +# +# NVS +# +# CONFIG_NVS_ENCRYPTION is not set +# CONFIG_NVS_ASSERT_ERROR_CHECK is not set +# CONFIG_NVS_LEGACY_DUP_KEYS_COMPATIBILITY is not set +# CONFIG_NVS_ALLOCATE_CACHE_IN_SPIRAM is not set +# end of NVS + +# +# PThreads +# +CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5 +CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 +CONFIG_PTHREAD_STACK_MIN=768 +CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY=y +# CONFIG_PTHREAD_DEFAULT_CORE_0 is not set +# CONFIG_PTHREAD_DEFAULT_CORE_1 is not set +CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1 +CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread" +# end of PThreads + +# +# MMU Config +# +CONFIG_MMU_PAGE_SIZE_64KB=y +CONFIG_MMU_PAGE_MODE="64KB" +CONFIG_MMU_PAGE_SIZE=0x10000 +# end of MMU Config + +# +# Main Flash configuration +# + +# +# SPI Flash behavior when brownout +# +CONFIG_SPI_FLASH_BROWNOUT_RESET_XMC=y +CONFIG_SPI_FLASH_BROWNOUT_RESET=y +# end of SPI Flash behavior when brownout + +# +# Optional and Experimental Features (READ DOCS FIRST) +# + +# +# Features here require specific hardware (READ DOCS FIRST!) +# +# CONFIG_SPI_FLASH_HPM_ENA is not set +# CONFIG_SPI_FLASH_HPM_AUTO is not set +CONFIG_SPI_FLASH_HPM_DIS=y +# CONFIG_SPI_FLASH_AUTO_SUSPEND is not set +CONFIG_SPI_FLASH_SUSPEND_TSUS_VAL_US=50 +# CONFIG_SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND is not set +# CONFIG_SPI_FLASH_FORCE_ENABLE_C6_H2_SUSPEND is not set +CONFIG_SPI_FLASH_PLACE_FUNCTIONS_IN_IRAM=y +# end of Optional and Experimental Features (READ DOCS FIRST) +# end of Main Flash configuration + +# +# SPI Flash driver +# +# CONFIG_SPI_FLASH_VERIFY_WRITE is not set +# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set +CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y +# CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS is not set +# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set +CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED=y +# CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE is not set +CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y +CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=20 +CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1 +CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192 +# CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set +# CONFIG_SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED is not set +# CONFIG_SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST is not set + +# +# Auto-detect flash chips +# +CONFIG_SPI_FLASH_VENDOR_XMC_SUPPORTED=y +# CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP is not set +# CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP is not set +# CONFIG_SPI_FLASH_SUPPORT_GD_CHIP is not set +CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y +# CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP is not set +# CONFIG_SPI_FLASH_SUPPORT_TH_CHIP is not set +# end of Auto-detect flash chips + +# CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE is not set +# end of SPI Flash driver + +# +# TCP Transport +# + +# +# Websocket +# +CONFIG_WS_TRANSPORT=y +CONFIG_WS_BUFFER_SIZE=1024 +# CONFIG_WS_DYNAMIC_BUFFER is not set +# end of Websocket +# end of TCP Transport + +# +# Virtual file system +# +CONFIG_VFS_SUPPORT_IO=y +CONFIG_VFS_SUPPORT_DIR=y +CONFIG_VFS_SUPPORT_SELECT=y +CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT=y +# CONFIG_VFS_SELECT_IN_RAM is not set +CONFIG_VFS_SUPPORT_TERMIOS=y +CONFIG_VFS_MAX_COUNT=8 + +# +# Host File System I/O (Semihosting) +# +CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS=1 +# end of Host File System I/O (Semihosting) + +CONFIG_VFS_INITIALIZE_DEV_NULL=y +# end of Virtual file system + +# +# Wear Levelling +# +# CONFIG_WL_SECTOR_SIZE_512 is not set +CONFIG_WL_SECTOR_SIZE_4096=y +CONFIG_WL_SECTOR_SIZE=4096 +# end of Wear Levelling +# end of Component config + +CONFIG_IDF_EXPERIMENTAL_FEATURES=y + +# Deprecated options for backward compatibility +# CONFIG_APP_BUILD_TYPE_ELF_RAM is not set +# CONFIG_NO_BLOBS is not set +# CONFIG_APP_ROLLBACK_ENABLE is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set +CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y +# CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set +CONFIG_LOG_BOOTLOADER_LEVEL=3 +# CONFIG_FLASH_ENCRYPTION_ENABLED is not set +CONFIG_FLASHMODE_QIO=y +# CONFIG_FLASHMODE_QOUT is not set +# CONFIG_FLASHMODE_DIO is not set +# CONFIG_FLASHMODE_DOUT is not set +CONFIG_MONITOR_BAUD=115200 +# CONFIG_OPTIMIZATION_LEVEL_DEBUG is not set +# CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG is not set +# CONFIG_COMPILER_OPTIMIZATION_DEFAULT is not set +CONFIG_OPTIMIZATION_LEVEL_RELEASE=y +CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE=y +# CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED is not set +CONFIG_OPTIMIZATION_ASSERTIONS_SILENT=y +# CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set +CONFIG_OPTIMIZATION_ASSERTION_LEVEL=1 +# CONFIG_CXX_EXCEPTIONS is not set +CONFIG_STACK_CHECK_NONE=y +# CONFIG_STACK_CHECK_NORM is not set +# CONFIG_STACK_CHECK_STRONG is not set +# CONFIG_STACK_CHECK_ALL is not set +# CONFIG_WARN_WRITE_STRINGS is not set +# CONFIG_ANA_CMPR_ISR_IRAM_SAFE is not set +# CONFIG_GPTIMER_ISR_IRAM_SAFE is not set +# CONFIG_MCPWM_ISR_IRAM_SAFE is not set +# CONFIG_EVENT_LOOP_PROFILING is not set +CONFIG_POST_EVENTS_FROM_ISR=y +CONFIG_POST_EVENTS_FROM_IRAM_ISR=y +CONFIG_PERIPH_CTRL_FUNC_IN_IRAM=y +CONFIG_BROWNOUT_DET=y +CONFIG_BROWNOUT_DET_LVL_SEL_7=y +# CONFIG_BROWNOUT_DET_LVL_SEL_6 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_5 is not set +CONFIG_BROWNOUT_DET_LVL=7 +CONFIG_ESP_SYSTEM_BROWNOUT_INTR=y +CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 +CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 +CONFIG_MAIN_TASK_STACK_SIZE=8192 +CONFIG_CONSOLE_UART_DEFAULT=y +# CONFIG_CONSOLE_UART_CUSTOM is not set +# CONFIG_CONSOLE_UART_NONE is not set +# CONFIG_ESP_CONSOLE_UART_NONE is not set +CONFIG_CONSOLE_UART=y +CONFIG_CONSOLE_UART_NUM=0 +CONFIG_CONSOLE_UART_BAUDRATE=115200 +CONFIG_INT_WDT=y +CONFIG_INT_WDT_TIMEOUT_MS=300 +CONFIG_INT_WDT_CHECK_CPU1=y +# CONFIG_TASK_WDT is not set +# CONFIG_ESP_TASK_WDT is not set +# CONFIG_ESP32_DEBUG_STUBS_ENABLE is not set +CONFIG_IPC_TASK_STACK_SIZE=1024 +CONFIG_TIMER_TASK_STACK_SIZE=3584 +CONFIG_TIMER_TASK_PRIORITY=1 +CONFIG_TIMER_TASK_STACK_DEPTH=2048 +CONFIG_TIMER_QUEUE_LENGTH=10 +# CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set +CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY=y +# CONFIG_HAL_ASSERTION_SILIENT is not set +# CONFIG_L2_TO_L3_COPY is not set +CONFIG_ESP_GRATUITOUS_ARP=y +CONFIG_GARP_TMR_INTERVAL=60 +CONFIG_TCPIP_RECVMBOX_SIZE=32 +CONFIG_TCP_MAXRTX=12 +CONFIG_TCP_SYNMAXRTX=12 +CONFIG_TCP_MSS=1440 +CONFIG_TCP_MSL=60000 +CONFIG_TCP_SND_BUF_DEFAULT=5760 +CONFIG_TCP_WND_DEFAULT=5760 +CONFIG_TCP_RECVMBOX_SIZE=6 +CONFIG_TCP_QUEUE_OOSEQ=y +CONFIG_TCP_OVERSIZE_MSS=y +# CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set +# CONFIG_TCP_OVERSIZE_DISABLE is not set +CONFIG_UDP_RECVMBOX_SIZE=6 +CONFIG_TCPIP_TASK_STACK_SIZE=3072 +CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY=y +# CONFIG_TCPIP_TASK_AFFINITY_CPU0 is not set +# CONFIG_TCPIP_TASK_AFFINITY_CPU1 is not set +CONFIG_TCPIP_TASK_AFFINITY=0x7FFFFFFF +# CONFIG_PPP_SUPPORT is not set +CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y +# CONFIG_NEWLIB_STDOUT_LINE_ENDING_LF is not set +# CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR is not set +# CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF is not set +# CONFIG_NEWLIB_STDIN_LINE_ENDING_LF is not set +CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y +CONFIG_NEWLIB_NANO_FORMAT=y +CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT=y +# CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC is not set +# CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT is not set +# CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE is not set +CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5 +CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 +CONFIG_ESP32_PTHREAD_STACK_MIN=768 +CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY=y +# CONFIG_ESP32_DEFAULT_PTHREAD_CORE_0 is not set +# CONFIG_ESP32_DEFAULT_PTHREAD_CORE_1 is not set +CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1 +CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread" +# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS is not set +# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS is not set +CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED=y +CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y +CONFIG_SUPPORT_TERMIOS=y +CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS=1 +# End of deprecated options diff --git a/components/retro-go/targets/vmu-s3/config.h b/components/retro-go/targets/vmu-s3/config.h index 71c577764..ed416cca5 100644 --- a/components/retro-go/targets/vmu-s3/config.h +++ b/components/retro-go/targets/vmu-s3/config.h @@ -59,7 +59,7 @@ /**************************************************************************** * Video * ****************************************************************************/ -#define RG_SCREEN_DRIVER 1 // 1 = ILI9341/ST7789 +#define RG_SCREEN_DRIVER 0 // 0 = ILI9341/ST7789 #define RG_SCREEN_HOST SPI2_HOST #define RG_SCREEN_SPEED SPI_MASTER_FREQ_40M #define RG_SCREEN_BACKLIGHT 1 @@ -72,24 +72,17 @@ #define RG_SCREEN_SAFE_AREA {0, 0, 0, 0} // Left, Top, Right, Bottom #define RG_SCREEN_PARTIAL_UPDATES 1 #define RG_SCREEN_INIT() \ - ILI9341_CMD(0xCF, 0x00, 0xc3, 0x30); \ - ILI9341_CMD(0xED, 0x64, 0x03, 0x12, 0x81); \ - ILI9341_CMD(0xE8, 0x85, 0x00, 0x78); \ - ILI9341_CMD(0xCB, 0x39, 0x2c, 0x00, 0x34, 0x02); \ - ILI9341_CMD(0xF7, 0x20); \ - ILI9341_CMD(0xEA, 0x00, 0x00); \ - ILI9341_CMD(0xC0, 0x1B); /* Power control //VRH[5:0] */ \ - ILI9341_CMD(0xC1, 0x12); /* Power control //SAP[2:0];BT[3:0] */ \ - ILI9341_CMD(0xC5, 0x32, 0x3C); /* VCM control */ \ - ILI9341_CMD(0xC7, 0x91); /* VCM control2 */ \ - ILI9341_CMD(0xB1, 0x00, 0x10); /* Frame Rate Control (1B=70, 1F=61, 10=119) */ \ - ILI9341_CMD(0xB6, 0x0A, 0xA2); /* Display Function Control */ \ - ILI9341_CMD(0xF6, 0x01, 0x30); \ - ILI9341_CMD(0xF2, 0x00); /* 3Gamma Function Disable */ \ + ILI9341_CMD(0xC0, 0x1B); /* Power control //VRH[5:0] */ \ + ILI9341_CMD(0xC1, 0x12); /* Power control //SAP[2:0];BT[3:0] */ \ + ILI9341_CMD(0xC5, 0x32, 0x3C); /* VCM control */ \ + ILI9341_CMD(0xC7, 0x91); /* VCM control2 */ \ + ILI9341_CMD(0xB2, 0x0C, 0x0C, 0x00, 0x33, 0x33); /* Porch Setting (0x0C, 0x0C=Std or 0x0F, 0x0F=Slow */ \ + ILI9341_CMD(0xC6, 0x03); /* ST7789 Frame Rate Control (0F=60, 07 to 00=75 to 119, 6Hz steps) */ \ + ILI9341_CMD(0xB6, 0x0A, 0x82); /* Gate Scan Direction (82=Std, A2=Inv, 22=Alt) */ \ + ILI9341_CMD(0xF6, 0x01, 0x00); /* Interface Control (01=Std, 21=Interleave */ \ ILI9341_CMD(0xE0, 0xD0, 0x00, 0x05, 0x0E, 0x15, 0x0D, 0x37, 0x43, 0x47, 0x09, 0x15, 0x12, 0x16, 0x19); \ ILI9341_CMD(0xE1, 0xD0, 0x00, 0x05, 0x0D, 0x0C, 0x06, 0x2D, 0x44, 0x40, 0x0E, 0x1C, 0x18, 0x16, 0x19); \ - #define RG_GPIO_LCD_MISO GPIO_NUM_NC #define RG_GPIO_LCD_MOSI GPIO_NUM_12 #define RG_GPIO_LCD_CLK GPIO_NUM_48 @@ -123,9 +116,9 @@ /**************************************************************************** * Battery * ****************************************************************************/ -#define RG_BATTERY_DRIVER 1 // 1 = ADC, 2 = MRGC -#define RG_BATTERY_ADC_UNIT ADC_UNIT_1 -#define RG_BATTERY_ADC_CHANNEL ADC_CHANNEL_3 +#define RG_BATTERY_DRIVER 1 // 1 = ADC, 2 = MRGC +#define RG_BATTERY_ADC_UNIT ADC_UNIT_1 +#define RG_BATTERY_ADC_CHANNEL ADC_CHANNEL_3 #define RG_BATTERY_CALC_PERCENT(raw) (((raw) * 2.f - 3200.f) / (4150.f - 3200.f) * 100.f) #define RG_BATTERY_CALC_VOLTAGE(raw) ((raw) * 2.f * 0.001f) @@ -135,7 +128,7 @@ ****************************************************************************/ #define RG_UPDATER_ENABLE 1 #define RG_UPDATER_APPLICATION RG_APP_FACTORY -#define RG_UPDATER_DOWNLOAD_LOCATION RG_STORAGE_ROOT "/vmu-s3/firmware" +#define RG_UPDATER_DOWNLOAD_LOCATION RG_STORAGE_ROOT "/retro-go/updates" /****************************************************************************