Machine: add privilege flags and decode-time illegal instruction checks

Extend instruction metadata with privilege flags (IMF_PRIV_M/H/S) for privileged operations. In the decode stage, compare the current privilege level against these flags to detect and raise illegal-instruction exceptions early, preventing execution of instructions that require higher privilege.

Author: nemecad

src/machine/core.cpp

@@ -343,6 +343,17 @@ DecodeState Core::decode(const FetchInterstage &dt) {
     ExceptionCause excause = dt.excause;
 
     dt.inst.flags_alu_op_mem_ctl(flags, alu_op, mem_ctl);
+    auto current_priv = state.current_privilege();
+    if ((flags & IMF_PRIV_M) && current_priv < CSR::PrivilegeLevel::MACHINE) {
+        excause = EXCAUSE_INSN_ILLEGAL;
+    }
+    if ((flags & IMF_PRIV_H) && current_priv < CSR::PrivilegeLevel::HYPERVISOR) {
+        excause = EXCAUSE_INSN_ILLEGAL;
+    }
+    if ((flags & IMF_PRIV_S) && current_priv < CSR::PrivilegeLevel::SUPERVISOR) {
+        excause = EXCAUSE_INSN_ILLEGAL;
+    }
+
     CSR::PrivilegeLevel inst_xret_priv = CSR::PrivilegeLevel::UNPRIVILEGED;
     if (flags & IMF_XRET) {
         inst_xret_priv = decode_xret_type_from_inst(dt.inst);

src/machine/instruction.cpp

@@ -750,6 +750,27 @@ void Instruction::flags_alu_op_mem_ctl(
     flags = (enum InstructionFlags)im.flags;
     alu_op = im.alu;
     mem_ctl = im.mem_ctl;
+    if (flags & IMF_CSR) {
+        machine::CSR::Address csr = csr_address();
+        uint32_t csr12 = csr.data & 0xfffu;
+        uint32_t min_bits = (csr12 >> 8) & 0x3u; // csr[9:8]
+        switch (min_bits) {
+            case 0u:
+                // User (no extra flag required)
+                break;
+            case 1u:
+                flags = InstructionFlags(flags | IMF_PRIV_S);
+                break;
+            case 2u:
+                flags = InstructionFlags(flags | IMF_PRIV_H);
+                break;
+            case 3u:
+                flags = InstructionFlags(flags | IMF_PRIV_M);
+                break;
+            default:
+                break;
+        }
+    }
 }
 
 bool Instruction::operator==(const Instruction &c) const {

src/machine/instruction.h

@@ -60,6 +60,11 @@ enum InstructionFlags : unsigned {
     // TODO do we want to add those signals to the visualization?
 
     IMF_RV64 = 1L << 24, /**< Mark instructions which are available in 64-bit mode only. */
+
+    /* Privilege requirement flags */
+    IMF_PRIV_S = 1L << 25, /**< Requires at least Supervisor privilege */
+    IMF_PRIV_H = 1L << 26, /**< Requires at least Hypervisor privilege */
+    IMF_PRIV_M = 1L << 27, /**< Requires Machine privilege */
 };
 
 /**