@@ -307,6 +307,8 @@ const char* ppcAssembler_getInstructionName(uint32 ppcAsmOp)
307307 case PPCASM_OP_MTLR : return " MTLR" ;
308308 case PPCASM_OP_MFCTR : return " MFCTR" ;
309309 case PPCASM_OP_MTCTR : return " MTCTR" ;
310+ case PPCASM_OP_MFCR : return " MFCR" ;
311+ case PPCASM_OP_MTCRF : return " MTCRF" ;
310312
311313 case PPCASM_OP_CROR : return " CROR" ;
312314 case PPCASM_OP_CRNOR : return " CRNOR" ;
@@ -1192,6 +1194,8 @@ PPCInstructionDef ppcInstructionTable[] =
11921194 {PPCASM_OP_MTLR , 0 , 31 , 467 , OPC_NONE , OP_FORM_DYNAMIC , FLG_DEFAULT , 0 , 0 , nullptr , {EncodedOperand_GPR (21 )}, {EncodedConstraint_FixedSPR (8 )} },
11931195 {PPCASM_OP_MFCTR , 0 , 31 , 339 , OPC_NONE , OP_FORM_DYNAMIC , FLG_DEFAULT , 0 , 0 , nullptr , {EncodedOperand_GPR (21 )}, {EncodedConstraint_FixedSPR (9 )} },
11941196 {PPCASM_OP_MTCTR , 0 , 31 , 467 , OPC_NONE , OP_FORM_DYNAMIC , FLG_DEFAULT , 0 , 0 , nullptr , {EncodedOperand_GPR (21 )}, {EncodedConstraint_FixedSPR (9 )} },
1197+ {PPCASM_OP_MFCR , 0 , 31 , 19 , OPC_NONE , OP_FORM_DYNAMIC , FLG_DEFAULT , 0 , 0 , nullptr , {EncodedOperand_GPR (21 )}},
1198+ {PPCASM_OP_MTCRF , 0 , 31 , 144 , OPC_NONE , OP_FORM_DYNAMIC , FLG_DEFAULT , 0 , 0 , nullptr , {EncodedOperand_IMM (12 , 8 , false ), EncodedOperand_GPR (21 )}},
11951199
11961200 {PPCASM_OP_ADD , 0 , 31 , 266 , OPC_NONE , OP_FORM_DYNAMIC , FLG_DEFAULT , C_MASK_RC , 0 , nullptr , {EncodedOperand_GPR (21 ), EncodedOperand_GPR (16 ), EncodedOperand_GPR (11 )} },
11971201 {PPCASM_OP_ADD_ , 0 , 31 , 266 , OPC_NONE , OP_FORM_DYNAMIC , FLG_DEFAULT , C_MASK_RC , C_BIT_RC , nullptr , {EncodedOperand_GPR (21 ), EncodedOperand_GPR (16 ), EncodedOperand_GPR (11 )} },
@@ -3591,6 +3595,18 @@ void ppcAsmTestDisassembler()
35913595 _testAsm (0x6fe9ff00 , " xoris r9, r31, 0xFF00" );
35923596 _testAsm (0x6fe9ffff , " xoris r9, r31, 0xFFFF" );
35933597
3598+ // mfcr / mtcrf
3599+ _testAsm (0x7D800026 , " mfcr r12" );
3600+ disassemble (0x7D800026 , PPCASM_OP_MFCR );
3601+ checkOperandMask (true );
3602+ checkOpGPR (0 , 12 );
3603+
3604+ _testAsm (0x7D808120 , " mtcrf 8, r12" );
3605+ disassemble (0x7D808120 , PPCASM_OP_MTCRF );
3606+ checkOperandMask (true , true );
3607+ checkOpImm (0 , 8 );
3608+ checkOpGPR (1 , 12 );
3609+
35943610 // data directives
35953611 _testAsmArray ({ 0x00 , 0x00 , 0x00 , 0x01 }, " .int 1" );
35963612 _testAsmArray ({ 0x00 , 0x00 , 0x00 , 0x01 , 0x11 , 0x22 , 0x33 , 0x44 }, " .int 1, 0x11223344" );
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