@@ -58,12 +58,14 @@ void UART::WrapperCallback(uart_callback_args_t *p_args) {
5858 {
5959 break ;
6060 }
61- case UART_EVENT_TX_COMPLETE:
62- case UART_EVENT_TX_DATA_EMPTY:
61+ case UART_EVENT_TX_COMPLETE: // This is call when the transmission is complete
6362 {
64- // uint8_t to_enqueue = uart_ptr->txBuffer.available() < uart_ptr->uart_ctrl.fifo_depth ? uart_ptr->txBuffer.available() : uart_ptr->uart_ctrl.fifo_depth;
65- // while (to_enqueue) {
66- uart_ptr->tx_done = true ;
63+ uart_ptr->tx_complete = true ;
64+ break ;
65+ }
66+ case UART_EVENT_TX_DATA_EMPTY: // This is called when the buffer is empty
67+ { // Last byte is transmitting, but ready for more data
68+ uart_ptr->tx_empty = true ;
6769 break ;
6870 }
6971 case UART_EVENT_RX_CHAR:
@@ -87,6 +89,8 @@ UART::UART(int _pin_tx, int _pin_rx, int _pin_rts, int _pin_cts):
8789 rx_pin(_pin_rx),
8890 rts_pin(_pin_rts),
8991 cts_pin(_pin_cts),
92+ tx_empty(true ),
93+ tx_complete(true ),
9094 init_ok(false ) {
9195/* -------------------------------------------------------------------------- */
9296 uart_cfg.txi_irq = FSP_INVALID_VECTOR;
@@ -109,9 +113,10 @@ bool UART::setUpUartIrqs(uart_cfg_t &cfg) {
109113size_t UART::write (uint8_t c) {
110114/* -------------------------------------------------------------------------- */
111115 if (init_ok) {
112- tx_done = false ;
116+ tx_empty = false ;
117+ tx_complete = false ;
113118 R_SCI_UART_Write (&uart_ctrl, &c, 1 );
114- while (!tx_done ) {}
119+ while (!tx_empty ) {}
115120 return 1 ;
116121 }
117122 else {
@@ -121,9 +126,10 @@ size_t UART::write(uint8_t c) {
121126
122127size_t UART::write (uint8_t * c, size_t len) {
123128 if (init_ok) {
124- tx_done = false ;
129+ tx_empty = false ;
130+ tx_complete = false ;
125131 R_SCI_UART_Write (&uart_ctrl, c, len);
126- while (!tx_done ) {}
132+ while (!tx_empty ) {}
127133 return len;
128134 }
129135 else {
@@ -322,7 +328,7 @@ int UART::read() {
322328/* -------------------------------------------------------------------------- */
323329void UART::flush () {
324330/* -------------------------------------------------------------------------- */
325- while (txBuffer. available () );
331+ while (!tx_complete );
326332}
327333
328334/* -------------------------------------------------------------------------- */
@@ -335,4 +341,4 @@ size_t UART::write_raw(uint8_t* c, size_t len) {
335341 i++;
336342 }
337343 return len;
338- }
344+ }
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