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Remove Unused Code and Preprocessor Directives in RP2040 Port (FreeRTOS#1324)
* Remove redundant code and preprocessor directives * Remove more redundant code and directives
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  • portable/ThirdParty/GCC/RP2040

1 file changed

+21
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portable/ThirdParty/GCC/RP2040/port.c

Lines changed: 21 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -243,35 +243,28 @@ void vPortStartFirstTask( void )
243243
" ldr r0, [r0] \n"
244244
" msr msp, r0 \n" /* Set the msp back to the start of the stack. */
245245
#endif /* configRESET_STACK_POINTER */
246-
#if ( configNUMBER_OF_CORES != 1 )
247246
" adr r1, ulAsmLocals \n" /* Get the location of the current TCB for the current core. */
248247
" ldmia r1!, {r2, r3} \n"
249248
" ldr r2, [r2] \n" /* r2 = Core number */
250249
" lsls r2, #2 \n"
251250
" ldr r3, [r3, r2] \n" /* r3 = pxCurrentTCBs[get_core_num()] */
252-
#else /* configNUMBER_OF_CORES != 1 */
253-
" ldr r3, =pxCurrentTCBs \n"
254-
" ldr r3, [r3] \n" /* r3 = pxCurrentTCBs[0] */
255-
#endif /* configNUMBER_OF_CORES != 1 */
256-
" ldr r0, [r3] \n" /* The first item in pxCurrentTCB is the task top of stack. */
257-
" adds r0, #32 \n" /* Discard everything up to r0. */
258-
" msr psp, r0 \n" /* This is now the new top of stack to use in the task. */
259-
" movs r0, #2 \n" /* Switch to the psp stack. */
260-
" msr CONTROL, r0 \n"
261-
" isb \n"
262-
" pop {r0-r5} \n" /* Pop the registers that are saved automatically. */
263-
" mov lr, r5 \n" /* lr is now in r5. */
264-
" pop {r3} \n" /* Return address is now in r3. */
265-
" pop {r2} \n" /* Pop and discard XPSR. */
266-
" cpsie i \n" /* The first task has its context and interrupts can be enabled. */
267-
" bx r3 \n" /* Finally, jump to the user defined task code. */
268-
#if configNUMBER_OF_CORES != 1
251+
" ldr r0, [r3] \n" /* The first item in pxCurrentTCB is the task top of stack. */
252+
" adds r0, #32 \n" /* Discard everything up to r0. */
253+
" msr psp, r0 \n" /* This is now the new top of stack to use in the task. */
254+
" movs r0, #2 \n" /* Switch to the psp stack. */
255+
" msr CONTROL, r0 \n"
256+
" isb \n"
257+
" pop {r0-r5} \n" /* Pop the registers that are saved automatically. */
258+
" mov lr, r5 \n" /* lr is now in r5. */
259+
" pop {r3} \n" /* Return address is now in r3. */
260+
" pop {r2} \n" /* Pop and discard XPSR. */
261+
" cpsie i \n" /* The first task has its context and interrupts can be enabled. */
262+
" bx r3 \n" /* Finally, jump to the user defined task code. */
269263
" \n"
270264
" .align 4 \n"
271265
"ulAsmLocals: \n"
272266
" .word 0xD0000000 \n" /* SIO */
273267
" .word pxCurrentTCBs \n"
274-
#endif /* portRUNNING_ON_BOTH_CORES */
275268
);
276269
#endif /* if ( configNUMBER_OF_CORES == 1 ) */
277270
}
@@ -369,14 +362,11 @@ void vPortStartFirstTask( void )
369362
spin_lock_claim( configSMP_SPINLOCK_0 );
370363
spin_lock_claim( configSMP_SPINLOCK_1 );
371364

372-
#if configNUMBER_OF_CORES != 1
373-
ucPrimaryCoreNum = configTICK_CORE;
374-
configASSERT( get_core_num() == 0 ); /* we must be started on core 0 */
375-
multicore_reset_core1();
376-
multicore_launch_core1( prvDisableInterruptsAndPortStartSchedulerOnCore );
377-
#else
378-
ucPrimaryCoreNum = get_core_num();
379-
#endif
365+
ucPrimaryCoreNum = configTICK_CORE;
366+
configASSERT( get_core_num() == 0 ); /* we must be started on core 0 */
367+
multicore_reset_core1();
368+
multicore_launch_core1( prvDisableInterruptsAndPortStartSchedulerOnCore );
369+
380370
xPortStartSchedulerOnCore();
381371

382372
/* Should not get here! */
@@ -618,13 +608,9 @@ void xPortPendSVHandler( void )
618608
" \n"
619609
" adr r0, ulAsmLocals2 \n" /* Get the location of the current TCB for the current core. */
620610
" ldmia r0!, {r2, r3} \n"
621-
#if configNUMBER_OF_CORES != 1
622-
" ldr r0, [r2] \n" /* r0 = Core number */
623-
" lsls r0, r0, #2 \n"
624-
" adds r3, r0 \n" /* r3 = &pxCurrentTCBs[get_core_num()] */
625-
#else
626-
" \n" /* r3 = &pxCurrentTCBs[0] */
627-
#endif /* portRUNNING_ON_BOTH_CORES */
611+
" ldr r0, [r2] \n" /* r0 = Core number */
612+
" lsls r0, r0, #2 \n"
613+
" adds r3, r0 \n" /* r3 = &pxCurrentTCBs[get_core_num()] */
628614
" ldr r0, [r3] \n" /* r0 = pxCurrentTCB */
629615
" \n"
630616
" subs r1, r1, #32 \n" /* Make space for the remaining low registers. */
@@ -658,11 +644,7 @@ void xPortPendSVHandler( void )
658644
" subs r1, r1, #48 \n"
659645
" stmia r1!, {r4-r7} \n"
660646
#endif /* portUSE_DIVIDER_SAVE_RESTORE */
661-
#if configNUMBER_OF_CORES != 1
662-
" ldr r0, [r2] \n" /* r0 = Core number */
663-
#else
664-
" movs r0, #0 \n"
665-
#endif /* configNUMBER_OF_CORES != 1 */
647+
" ldr r0, [r2] \n" /* r0 = Core number */
666648
" push {r3, r14} \n"
667649
" cpsid i \n"
668650
" bl vTaskSwitchContext \n"

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