Hi
I'm not sure if I like the two lines here:
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# don't care about the reset performance |
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set_false_path -quiet -from [get_pins top_i/clock_reset/usr_?_psr/U0/ACTIVE_LOW_BSR_OUT_DFF[0].FDRE_BSR_N/C] |
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set_false_path -quiet -from [get_pins top_i/clock_reset/usr_?_psr/U0/ACTIVE_LOW_PR_OUT_DFF[0].FDRE_PER_N/C] |
Why would that concern the "reset performance"?
This simply disables reset recovery and removal checks - what is bad in a synchronous design.
And it actually hides a massive problem on SLR designs.
Best regards,
Emanuel
Hi
I'm not sure if I like the two lines here:
AVED/hw/amd_v80_gen5x8_24.1/src/constraints/impl.xdc
Lines 22 to 24 in 7497599
Why would that concern the "reset performance"?
This simply disables reset recovery and removal checks - what is bad in a synchronous design.
And it actually hides a massive problem on SLR designs.
Best regards,
Emanuel