diff --git a/device-index.md b/device-index.md
index d924049..b36de2f 100644
--- a/device-index.md
+++ b/device-index.md
@@ -1,6 +1,9 @@
 ## Buffers, Inverters
 [7404](source-7400/7404.v) Hex inverter
 [7407](source-7400/7407.v) Hex buffer/driver (OC)
+[74125](source-7400/74125.v) Quad bus buffer, negative enable
+[74126](source-7400/74126.v) Quad bus buffer, positive enable
+[74244](source-7400/74244.v) Octal buffer with 3-state output
 
 ## Gates
 [7400](source-7400/7400.v) Quad 2-input NAND gate
diff --git a/source-7400/74125.v b/source-7400/74125.v
new file mode 100644
index 0000000..4b67835
--- /dev/null
+++ b/source-7400/74125.v
@@ -0,0 +1,23 @@
+// Quad bus buffer, negative enable
+
+module ttl_74125 #(parameter BLOCKS = 4, DELAY_RISE = 0, DELAY_FALL = 0)
+(
+  input [BLOCKS-1:0] C,
+  input [BLOCKS-1:0] A,
+  output [BLOCKS-1:0] Y
+);
+
+//------------------------------------------------//
+integer i;
+reg [BLOCKS-1:0] computed;
+
+always @(*)
+begin
+  for (i = 0; i < BLOCKS; i++)
+    computed[i] = C[i] ? 1'bZ : A[i];
+end
+//------------------------------------------------//
+
+assign #(DELAY_RISE, DELAY_FALL) Y = computed;
+
+endmodule
diff --git a/source-7400/74126.v b/source-7400/74126.v
new file mode 100644
index 0000000..a035db1
--- /dev/null
+++ b/source-7400/74126.v
@@ -0,0 +1,23 @@
+// Quad bus buffer, positive enable
+
+module ttl_74126 #(parameter BLOCKS = 4, DELAY_RISE = 0, DELAY_FALL = 0)
+(
+  input [BLOCKS-1:0] C,
+  input [BLOCKS-1:0] A,
+  output [BLOCKS-1:0] Y
+);
+
+//------------------------------------------------//
+integer i;
+reg [BLOCKS-1:0] computed;
+
+always @(*)
+begin
+  for (i = 0; i < BLOCKS; i++)
+    computed[i] = C[i] ? A[i] : 1'bZ;
+end
+//------------------------------------------------//
+
+assign #(DELAY_RISE, DELAY_FALL) Y = computed;
+
+endmodule
diff --git a/source-7400/74244.v b/source-7400/74244.v
new file mode 100644
index 0000000..5aaeb65
--- /dev/null
+++ b/source-7400/74244.v
@@ -0,0 +1,23 @@
+// Octal buffer with 3-state output
+
+module ttl_74244 #(parameter WIDTH = 8, DELAY_RISE = 0, DELAY_FALL = 0)
+(
+  input [(WIDTH-1)/4:0] G_bar,
+  input [WIDTH-1:0] A,
+  output [WIDTH-1:0] Y
+);
+
+//------------------------------------------------//
+integer i;
+reg [WIDTH-1:0] computed;
+
+always @(*)
+begin
+  for (i = 0; i < WIDTH; i++)
+    computed[i] = G_bar[i/4] ? 1'bZ : A[i];
+end
+//------------------------------------------------//
+
+assign #(DELAY_RISE, DELAY_FALL) Y = computed;
+
+endmodule