diff --git a/mlir/include/mlir/Dialect/DSP/IR/DSP.td b/mlir/include/mlir/Dialect/DSP/IR/DSP.td index 0703ad178514..65ac566384a2 100644 --- a/mlir/include/mlir/Dialect/DSP/IR/DSP.td +++ b/mlir/include/mlir/Dialect/DSP/IR/DSP.td @@ -61,15 +61,17 @@ def ConstantOp : DSP_Op<"constant", [Pure]> { ```mlir %0 = dsp.constant dense<[[1.0, 2.0, 3.0], [4.0, 5.0, 6.0]]> - : tensor<2x3xf64> + : tensor<2x3xf32> ``` }]; // The constant operation takes an attribute as the only input. - let arguments = (ins F64ElementsAttr:$value); + let arguments = (ins F32ElementsAttr:$value); + + // The constant operation returns a single value of TensorType. - let results = (outs F64Tensor); + let results = (outs F32Tensor); // Indicate that the operation has a custom parser and printer method. let hasCustomAssemblyFormat = 1; @@ -106,8 +108,8 @@ def ModuloOp : DSP_Op<"modulo", The shapes of the tensor operands are expected to match. }]; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs); + let results = (outs F32Tensor); let builders = [ OpBuilder<(ins "Value":$lhs, "Value":$rhs)> @@ -126,8 +128,8 @@ def AddOp : DSP_Op<"add", The shapes of the tensor operands are expected to match. }]; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs); + let results = (outs F32Tensor); // Indicate that the operation has a custom parser and printer method. let hasCustomAssemblyFormat = 1; @@ -157,8 +159,8 @@ def CastOp : DSP_Op<"cast", [ mismatching constant dimension. }]; - let arguments = (ins F64Tensor:$input); - let results = (outs F64Tensor:$output); + let arguments = (ins F32Tensor:$input); + let results = (outs F32Tensor:$output); let assemblyFormat = "$input attr-dict `:` type($input) `to` type($output)"; } @@ -179,9 +181,9 @@ def FuncOp : DSP_Op<"func", [ ```mlir dsp.func @main() { - %0 = dsp.constant dense<5.500000e+00> : tensor - %1 = dsp.reshape(%0 : tensor) to tensor<2x2xf64> - dsp.print %1 : tensor<2x2xf64> + %0 = dsp.constant dense<5.500000e+00> : tensor + %1 = dsp.reshape(%0 : tensor) to tensor<2x2xf32> + dsp.print %1 : tensor<2x2xf32> dsp.return } ``` @@ -232,7 +234,7 @@ def GenericCallOp : DSP_Op<"generic_call", ```mlir %4 = dsp.generic_call @my_func(%1, %3) - : (tensor<2x3xf64>, tensor<2x3xf64>) -> tensor<*xf64> + : (tensor<2x3xf32>, tensor<2x3xf32>) -> tensor<*xf32> ``` This is only valid if a function named "my_func" exists and takes two @@ -241,10 +243,10 @@ def GenericCallOp : DSP_Op<"generic_call", // The generic call operation takes a symbol reference attribute as the // callee, and inputs for the call. - let arguments = (ins FlatSymbolRefAttr:$callee, Variadic:$inputs); + let arguments = (ins FlatSymbolRefAttr:$callee, Variadic:$inputs); // The generic call operation returns a single value of TensorType. - let results = (outs F64Tensor); + let results = (outs F32Tensor); // Specialize assembly printing and parsing using a declarative format. let assemblyFormat = [{ @@ -269,8 +271,8 @@ def MulOp : DSP_Op<"mul", tensors. The shapes of the tensor operands are expected to match. }]; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs); + let results = (outs F32Tensor); // Indicate that the operation has a custom parser and printer method. let hasCustomAssemblyFormat = 1; @@ -296,8 +298,8 @@ def DivOp : DSP_Op<"div", tensors. The shapes of the tensor operands are expected to match. }]; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs); + let results = (outs F32Tensor); // Indicate that the operation has a custom parser and printer method. let hasCustomAssemblyFormat = 1; @@ -322,8 +324,8 @@ def BitwiseAndOp : DSP_Op<"bitwiseand", tensors. The shapes of the tensor operands are expected to match. }]; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs); + let results = (outs F32Tensor); // Indicate that the operation has a custom parser and printer method. let hasCustomAssemblyFormat = 1; @@ -346,8 +348,8 @@ def PowOp : DSP_Op<"pow", The accepted operand is restrict to a scaler constant. }]; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs); + let results = (outs F32Tensor); // has custom parser and printer for method // let hasCustomAssemblyFormat = 1; @@ -371,8 +373,8 @@ def PrintOp : DSP_Op<"print"> { }]; // The print operation takes an input tensor to print. - // We also allow a F64MemRef to enable interop during partial lowering. - let arguments = (ins AnyTypeOf<[F64Tensor, F64MemRef]>:$input); + // We also allow a F32MemRef to enable interop during partial lowering. + let arguments = (ins AnyTypeOf<[F32Tensor, F32MemRef]>:$input); let assemblyFormat = "$input attr-dict `:` type($input)"; } @@ -388,11 +390,11 @@ def ReshapeOp : DSP_Op<"reshape", [Pure]> { the same number of elements but different shapes. For example: ```mlir - %0 = dsp.reshape (%arg1 : tensor<10xf64>) to tensor<5x2xf64> + %0 = dsp.reshape (%arg1 : tensor<10xf32>) to tensor<5x2xf32> ``` }]; - let arguments = (ins F64Tensor:$input); + let arguments = (ins F32Tensor:$input); let assemblyFormat = [{ `(` $input `:` type($input) `)` attr-dict `to` type(results) @@ -402,7 +404,7 @@ def ReshapeOp : DSP_Op<"reshape", [Pure]> { let hasCanonicalizer = 1; // We expect that the reshape operation returns a statically shaped tensor. - let results = (outs StaticShapeTensorOf<[F64]>); + let results = (outs StaticShapeTensorOf<[F32]>); } //===----------------------------------------------------------------------===// @@ -419,16 +421,16 @@ def ReturnOp : DSP_Op<"return", [Pure, HasParent<"FuncOp">, the operation. For example: ```mlir - dsp.func @foo() -> tensor<2xf64> { + dsp.func @foo() -> tensor<2xf32> { ... - dsp.return %0 : tensor<2xf64> + dsp.return %0 : tensor<2xf32> } ``` }]; // The return operation takes an optional input operand to return. This // value must match the return type of the enclosing function. - let arguments = (ins Variadic:$input); + let arguments = (ins Variadic:$input); // The return operation only emits the input in the format if it is present. let assemblyFormat = "($input^ `:` type($input))? attr-dict "; @@ -455,8 +457,8 @@ def TransposeOp : DSP_Op<"transpose", [Pure, DeclareOpInterfaceMethods]> { let summary = "transpose operation"; - let arguments = (ins F64Tensor:$input); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input); + let results = (outs F32Tensor); let assemblyFormat = [{ `(` $input `:` type($input) `)` attr-dict `to` type(results) @@ -487,12 +489,12 @@ def DelayOp : DSP_Op<"delay" , The shapes of the tensor operands are expected to match. }]; - // let arguments = (ins F64Tensor:$lhs, UI32:$rhs); // - // let results = (outs F64Tensor); + // let arguments = (ins F32Tensor:$lhs, UI32:$rhs); // + // let results = (outs F32Tensor); - // let arguments = (ins F64Tensor:$lhs, UI32:$rhs); - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs);//working - let results = (outs F64Tensor); + // let arguments = (ins F32Tensor:$lhs, UI32:$rhs); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs);//working + let results = (outs F32Tensor); // Indicate that the operation has a custom parser and printer method. // let hasCustomAssemblyFormat = 1; @@ -532,14 +534,14 @@ def GainOp : DSP_Op<"gain" , The shapes of the tensor operands are expected to match. }]; - // let arguments = (ins F64Tensor:$lhs, UI32:$rhs); // - // let results = (outs F64Tensor); + // let arguments = (ins F32Tensor:$lhs, UI32:$rhs); // + // let results = (outs F32Tensor); - // let arguments = (ins F64Tensor:$lhs, UI32:$rhs); - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs);//working -- F64 - // let arguments = (ins F64Tensor:$lhs, F64:$rhs); - // let arguments = (ins F64Tensor:$lhs, F64Attr:$rhs); - let results = (outs F64Tensor); //I64 + // let arguments = (ins F32Tensor:$lhs, UI32:$rhs); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs);//working -- F32 + // let arguments = (ins F32Tensor:$lhs, F32:$rhs); + // let arguments = (ins F32Tensor:$lhs, F32Attr:$rhs); + let results = (outs F32Tensor); //I32 // Indicate that the operation has a custom parser and printer method. @@ -571,8 +573,8 @@ def SubOp : DSP_Op<"sub", [Pure , DeclareOpInterfaceMethods @@ -624,8 +626,8 @@ def FFTImagOp : DSP_Op<"fftImag", [Pure, DeclareOpInterfaceMethods @@ -643,9 +645,9 @@ def zeroCrossCountOp : DSP_Op<"zeroCrossCount" , ex: [-1 , -2 , 3, 0 , 0, -2] has 2 zero-crosses }]; - let arguments = (ins F64Tensor:$lhs); //working -- F64 - let results = (outs F64Tensor); - // let results = (outs I64); + let arguments = (ins F32Tensor:$lhs); //working -- F32 + let results = (outs F32Tensor); + // let results = (outs I32); // Indicate that the operation has a custom parser and printer method. // let hasCustomAssemblyFormat = 1; @@ -679,9 +681,9 @@ def FIRFilterResponseOp : DSP_Op<"FIRFilterResponse" , y[n] = sum(h(k) . x(n-k)) k=0 to N-1 }]; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs); //working -- F64 - let results = (outs F64Tensor); - // let results = (outs I64); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs); //working -- F32 + let results = (outs F32Tensor); + // let results = (outs I32); // Indicate that the operation has a custom parser and printer method. // let hasCustomAssemblyFormat = 1; @@ -709,8 +711,8 @@ def FIRFilterResponseOp : DSP_Op<"FIRFilterResponse" , def MedianFilterOp : DSP_Op<"medianFilter", [Pure, DeclareOpInterfaceMethods]> { - let arguments = (ins F64Tensor:$input); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input); + let results = (outs F32Tensor); let builders = [ OpBuilder<(ins "Value":$input)> @@ -725,8 +727,8 @@ def SlidingWindowAvgOp : DSP_Op<"slidingWindowAvg", [Pure, DeclareOpInterfaceMethods]> { let summary = "sliding window average operation"; - let arguments = (ins F64Tensor:$input); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input); + let results = (outs F32Tensor); let assemblyFormat = [{ `(` $input `:` type($input) `)` attr-dict `to` type(results) @@ -760,8 +762,8 @@ def DownsamplingOp : DSP_Op<"downsampling" , }]; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs);//working -- F64 - let results = (outs F64Tensor); //I64 + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs);//working -- F32 + let results = (outs F32Tensor); //I32 // Indicate that the operation has a custom parser and printer method. @@ -799,8 +801,8 @@ def UpsamplingOp : DSP_Op<"upsampling" , }]; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs);//working -- F64 - let results = (outs F64Tensor); //I64 + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs);//working -- F32 + let results = (outs F32Tensor); //I32 // Indicate that the operation has a custom parser and printer method. @@ -838,8 +840,8 @@ def LowPassFilter1stOrderOp : DSP_Op<"lowPassFilter" , }]; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs);//working -- F64 - let results = (outs F64Tensor); //I64 + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs);//working -- F32 + let results = (outs F32Tensor); //I32 // Indicate that the operation has a custom parser and printer method. @@ -877,8 +879,8 @@ def HighPassFilterOp : DSP_Op<"highPassFilter", The shapes of the tensor operands are expected to match. }]; - let arguments = (ins F64Tensor:$input); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input); + let results = (outs F32Tensor); // let assemblyFormat = [{ // `(` $input `:` type($input) `)` attr-dict `to` type(results) @@ -917,9 +919,9 @@ def FFT1DOp : DSP_Op<"fft1d", The shapes of the tensor operands are expected to match. }]; - let arguments = (ins F64Tensor:$input); - let results = (outs F64Tensor:$real, F64Tensor:$img); //(ins F64Tensor:$lhs, F64Tensor:$rhs); - // let results = (outs F64Tensor:$real); + let arguments = (ins F32Tensor:$input); + let results = (outs F32Tensor:$real, F32Tensor:$img); //(ins F32Tensor:$lhs, F32Tensor:$rhs); + // let results = (outs F32Tensor:$real); // let assemblyFormat = [{ // `(` $input `:` type($input) `)` attr-dict `to` type(results) // }]; @@ -957,10 +959,10 @@ def IFFT1DOp : DSP_Op<"ifft1d", The shapes of the tensor operands are expected to match. }]; - // let arguments = (ins F64Tensor:$input , F64Tensor:$input); - let arguments = (ins F64Tensor:$real , F64Tensor:$img); - // let results = (outs F64Tensor:$real, F64Tensor:$img); //(ins F64Tensor:$lhs, F64Tensor:$rhs); - let results = (outs F64Tensor); + // let arguments = (ins F32Tensor:$input , F32Tensor:$input); + let arguments = (ins F32Tensor:$real , F32Tensor:$img); + // let results = (outs F32Tensor:$real, F32Tensor:$img); //(ins F32Tensor:$lhs, F32Tensor:$rhs); + let results = (outs F32Tensor); let hasCanonicalizer = 1; @@ -989,9 +991,9 @@ def HammingWindowOp : DSP_Op<"hamming", The shapes of the tensor operands are expected to match. }]; - let arguments = (ins F64Tensor:$input); - // let results = (outs F64Tensor:$real, F64Tensor:$img); //(ins F64Tensor:$lhs, F64Tensor:$rhs); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input); + // let results = (outs F32Tensor:$real, F32Tensor:$img); //(ins F32Tensor:$lhs, F32Tensor:$rhs); + let results = (outs F32Tensor); let assemblyFormat = [{ `(` $input `:` type($input) `)` attr-dict `to` type(results) }]; @@ -1031,9 +1033,9 @@ def DCTOp : DSP_Op<"dct", The shapes of the tensor operands are expected to match. }]; - let arguments = (ins F64Tensor:$input); - // let results = (outs F64Tensor:$real, F64Tensor:$img); //(ins F64Tensor:$lhs, F64Tensor:$rhs); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input); + // let results = (outs F32Tensor:$real, F32Tensor:$img); //(ins F32Tensor:$lhs, F32Tensor:$rhs); + let results = (outs F32Tensor); let assemblyFormat = [{ `(` $input `:` type($input) `)` attr-dict `to` type(results) }]; @@ -1068,8 +1070,8 @@ def filterOp : DSP_Op<"filter" , also, y[0] = b[0] * x[0] }]; - let arguments = (ins F64Tensor:$b, F64Tensor:$a, F64Tensor:$x); //working -- F64 - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$b, F32Tensor:$a, F32Tensor:$x); //working -- F32 + let results = (outs F32Tensor); // Indicate that the operation has a custom parser and printer method. // let hasCustomAssemblyFormat = 1; @@ -1099,8 +1101,8 @@ def SumOp : DSP_Op<"sum", [Pure, DeclareOpInterfaceMethods]> { let summary = "sum of all the elements operation"; - let arguments = (ins F64Tensor:$input); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input); + let results = (outs F32Tensor); let assemblyFormat = [{ `(` $input `:` type($input) `)` attr-dict `to` type(results) @@ -1129,9 +1131,9 @@ def SumOp : DSP_Op<"sum", The sin operation computes the sine of a given value. It takes one operand of floating point type (i.e., scalar, tensor or vector) and returns one result of the same type. It has no standard attributes. }]; - let arguments = (ins F64Tensor:$input); - // let results = (outs F64Tensor:$real, F64Tensor:$img); //(ins F64Tensor:$lhs, F64Tensor:$rhs); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input); + // let results = (outs F32Tensor:$real, F32Tensor:$img); //(ins F32Tensor:$lhs, F32Tensor:$rhs); + let results = (outs F32Tensor); let assemblyFormat = [{ `(` $input `:` type($input) `)` attr-dict `to` type(results) }]; @@ -1163,9 +1165,9 @@ def SumOp : DSP_Op<"sum", The cos operation computes the cosine of a given value. It takes one operand of floating point type (i.e., scalar, tensor or vector) and returns one result of the same type. It has no standard attributes. }]; - let arguments = (ins F64Tensor:$input); - // let results = (outs F64Tensor:$real, F64Tensor:$img); //(ins F64Tensor:$lhs, F64Tensor:$rhs); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input); + // let results = (outs F32Tensor:$real, F32Tensor:$img); //(ins F32Tensor:$lhs, F32Tensor:$rhs); + let results = (outs F32Tensor); let assemblyFormat = [{ `(` $input `:` type($input) `)` attr-dict `to` type(results) }]; @@ -1195,8 +1197,8 @@ def SquareOp : DSP_Op<"square", [Pure, DeclareOpInterfaceMethods]> { let summary = "square of the input vector"; - let arguments = (ins F64Tensor:$input); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input); + let results = (outs F32Tensor); let assemblyFormat = [{ `(` $input `:` type($input) `)` attr-dict `to` type(results) @@ -1230,9 +1232,9 @@ def FFT1DRealOp : DSP_Op<"fft1dreal", The shapes of the tensor operands are expected to match. }]; - let arguments = (ins F64Tensor:$input); - let results = (outs F64Tensor:$real); //(ins F64Tensor:$lhs, F64Tensor:$rhs); - // let results = (outs F64Tensor:$real); + let arguments = (ins F32Tensor:$input); + let results = (outs F32Tensor:$real); //(ins F32Tensor:$lhs, F32Tensor:$rhs); + // let results = (outs F32Tensor:$real); // let assemblyFormat = [{ // `(` $input `:` type($input) `)` attr-dict `to` type(results) // }]; @@ -1270,9 +1272,9 @@ def FFT1DImgOp : DSP_Op<"fft1dimg", The shapes of the tensor operands are expected to match. }]; - let arguments = (ins F64Tensor:$input); - let results = (outs F64Tensor:$real); //(ins F64Tensor:$lhs, F64Tensor:$rhs); - // let results = (outs F64Tensor:$real); + let arguments = (ins F32Tensor:$input); + let results = (outs F32Tensor:$real); //(ins F32Tensor:$lhs, F32Tensor:$rhs); + // let results = (outs F32Tensor:$real); // let assemblyFormat = [{ // `(` $input `:` type($input) `)` attr-dict `to` type(results) // }]; @@ -1309,9 +1311,9 @@ def SincOp : DSP_Op<"sinc", The shapes of the tensor operands are expected to match. }]; - let arguments = (ins F64Tensor:$wc , F64Tensor:$n); - let results = (outs F64Tensor); //(ins F64Tensor:$lhs, F64Tensor:$rhs); - // let results = (outs F64Tensor:$real); + let arguments = (ins F32Tensor:$wc , F32Tensor:$n); + let results = (outs F32Tensor); //(ins F32Tensor:$lhs, F32Tensor:$rhs); + // let results = (outs F32Tensor:$real); // let assemblyFormat = [{ // `(` $input `:` type($input) `)` attr-dict `to` type(results) // }]; @@ -1340,8 +1342,8 @@ def GetElemAtIndxOp : DSP_Op<"getElemAtIndx", [Pure, DeclareOpInterfaceMethods]> { let summary = "get elem at given indx of the vector"; - let arguments = (ins F64Tensor:$input, F64Tensor:$indx); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input, F32Tensor:$indx); + let results = (outs F32Tensor); // let assemblyFormat = [{ // `(` $input `:` type($input) `)` attr-dict `to` type(results) @@ -1372,8 +1374,8 @@ def GetSingleElemAtIdxOp : DSP_Op<"getSingleElemAtIndx", [Pure, DeclareOpInterfaceMethods]> { let summary = "This one access ranked tensor at idx and returns signle tensor without dimension."; - let arguments = (ins F64Tensor:$input, F64Tensor:$indx); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input, F32Tensor:$indx); + let results = (outs F32Tensor); let builders = [ OpBuilder<(ins "Value":$input, "Value":$indx)> @@ -1394,8 +1396,8 @@ def Diff2MeanOptimizedOp : DSP_Op<"diff2meanOpt", [Pure, DeclareOpInterfaceMethods]> { let summary = "This one implemnets mean(diff(input)) as (input[-1] - input[0])/len(input). Note that mean uses length of diff, this operation consider input[-1] == input[length paramter of mean], not input[length paramter of mean-1]"; - let arguments = (ins F64Tensor:$input, F64Tensor:$length); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input, F32Tensor:$length); + let results = (outs F32Tensor); let builders = [ OpBuilder<(ins "Value":$input, "Value":$length)> @@ -1412,8 +1414,8 @@ def FindPeaks2Diff2MeanOptimizedOp : DSP_Op<"findpeaks2diff2meanOpt", [Pure, DeclareOpInterfaceMethods]> { let summary = "This one implemnets mean(diff(find_peaks(input))) as (peak[-1] - peak[0])/(len(peaks)-1)."; - let arguments = (ins F64Tensor:$signal, F64Tensor:$height, F64Tensor:$distance); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$signal, F32Tensor:$height, F32Tensor:$distance); + let results = (outs F32Tensor); let builders = [ OpBuilder<(ins "Value":$signal, "Value":$height, "Value":$distance)> @@ -1434,8 +1436,8 @@ def LMS2FindPeaksOptimizedOp : DSP_Op<"lms2findPeaks", [Pure, DeclareOpInterfaceMethods]> { let summary = "Fusing loop for LMSFilterResponseOp and FindPeaksOp"; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs, F64Tensor:$mu, F64Tensor:$filterLen, F64Tensor:$height, F64Tensor:$distance); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs, F32Tensor:$mu, F32Tensor:$filterLen, F32Tensor:$height, F32Tensor:$distance); + let results = (outs F32Tensor); let builders = [ OpBuilder<(ins "Value":$lhs, "Value":$rhs, "Value":$mu, "Value":$filterLen, "Value":$height, "Value":$distance)> @@ -1455,8 +1457,8 @@ def SetElemAtIndxOp : DSP_Op<"setElemAtIndx", [Pure, DeclareOpInterfaceMethods]> { let summary = "set elem at given indx of the vector"; - let arguments = (ins F64Tensor:$input, F64Tensor:$indx , F64Tensor:$val); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input, F32Tensor:$indx , F32Tensor:$val); + let results = (outs F32Tensor); // let assemblyFormat = [{ // `(` $input `:` type($input) `)` attr-dict `to` type(results) @@ -1491,9 +1493,9 @@ def LowPassFIRFilterOp : DSP_Op<"lowPassFIRFilter", The shapes of the tensor operands are expected to match. }]; - let arguments = (ins F64Tensor:$wc, F64Tensor:$n); - // let results = (outs F64Tensor:$real, F64Tensor:$img); //(ins F64Tensor:$lhs, F64Tensor:$rhs); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$wc, F32Tensor:$n); + // let results = (outs F32Tensor:$real, F32Tensor:$img); //(ins F32Tensor:$lhs, F32Tensor:$rhs); + let results = (outs F32Tensor); // let assemblyFormat = [{ // `(` $input `:` type($input) `)` attr-dict `to` type(results) // }]; @@ -1530,8 +1532,8 @@ def LMSFilterOp : DSP_Op<"lmsFilter", w(n)=αw(n−1)+f(u(n),e(n),μ) }]; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs, F64Tensor:$mu, F64Tensor:$filterLen, F64Tensor:$iters); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs, F32Tensor:$mu, F32Tensor:$filterLen, F32Tensor:$iters); + let results = (outs F32Tensor); /// Indicate that the operation has a custom parser and printer method. // let hasCustomAssemblyFormat = 1; // let assemblyFormat = [{ @@ -1566,8 +1568,8 @@ def HighPassFIRFilterOp : DSP_Op<"highPassFIRFilter", ex: N = odd for symmetry & Output : y= [0.08,0.54,1,0.54] }]; - let arguments = (ins F64Tensor:$wc, F64Tensor:$N); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$wc, F32Tensor:$N); + let results = (outs F32Tensor); // let assemblyFormat = [{ // `(` $input `:` type($input) `)` attr-dict `to` type(results) // }]; @@ -1605,8 +1607,8 @@ def GetRangeOfVectorOp : DSP_Op<"getRangeOfVector", }]; - let arguments = (ins F64Tensor:$first, F64Tensor:$N, F64Tensor:$step); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$first, F32Tensor:$N, F32Tensor:$step); + let results = (outs F32Tensor); // let assemblyFormat = [{ // `(` $input `:` type($input) `)` attr-dict `to` type(results) // }]; @@ -1647,9 +1649,9 @@ def FIRFilterHammingOptimizedOp : DSP_Op<"FIRFilterHammingOptimized", }]; - let arguments = (ins F64Tensor:$wc, F64Tensor:$n); - // let results = (outs F64Tensor:$real, F64Tensor:$img); //(ins F64Tensor:$lhs, F64Tensor:$rhs); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$wc, F32Tensor:$n); + // let results = (outs F32Tensor:$real, F32Tensor:$img); //(ins F32Tensor:$lhs, F32Tensor:$rhs); + let results = (outs F32Tensor); // let assemblyFormat = [{ // `(` $input `:` type($input) `)` attr-dict `to` type(results) // }]; @@ -1690,9 +1692,9 @@ def HighPassFIRHammingOptimizedOp : DSP_Op<"highPassFIRHammingOptimizedOp", }]; - let arguments = (ins F64Tensor:$wc, F64Tensor:$n); - // let results = (outs F64Tensor:$real, F64Tensor:$img); //(ins F64Tensor:$lhs, F64Tensor:$rhs); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$wc, F32Tensor:$n); + // let results = (outs F32Tensor:$real, F32Tensor:$img); //(ins F32Tensor:$lhs, F32Tensor:$rhs); + let results = (outs F32Tensor); // let assemblyFormat = [{ // `(` $input `:` type($input) `)` attr-dict `to` type(results) // }]; @@ -1728,8 +1730,8 @@ def ThresholdOp : DSP_Op<"threshold", ex: Input x= [-0.08,-5.4,-1,3.4] and threshld = 2 , then y[n] = [ 0, -5.4, 0, 3.4] }]; - let arguments = (ins F64Tensor:$input, F64Tensor:$threshld); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input, F32Tensor:$threshld); + let results = (outs F32Tensor); // let assemblyFormat = [{ // `(` $input `:` type($input) `)` attr-dict `to` type(results) @@ -1773,8 +1775,8 @@ def QuantizationOp : DSP_Op<"quantization", Quantized coefficients: [ 3.125 -1.25 0.625 -3.125 4.375] }]; - let arguments = (ins F64Tensor:$input, F64Tensor:$Nlevels, F64Tensor:$max, F64Tensor:$min); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input, F32Tensor:$Nlevels, F32Tensor:$max, F32Tensor:$min); + let results = (outs F32Tensor); // Enable registering canonicalization patterns with this operation. // let hasCanonicalizer = 1; @@ -1803,8 +1805,8 @@ def LMSFilterResponseOp : DSP_Op<"lmsFilterResponse", w(n)=αw(n−1)+f(u(n),e(n),μ) }]; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs, F64Tensor:$mu, F64Tensor:$filterLen); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs, F32Tensor:$mu, F32Tensor:$filterLen); + let results = (outs F32Tensor); /// Indicate that the operation has a custom parser and printer method. // let hasCustomAssemblyFormat = 1; // let assemblyFormat = [{ @@ -1838,8 +1840,8 @@ def RunLenEncodingOp : DSP_Op<"runLenEncoding", then output is [4,2,-1,2, 0,0,0,0 , 2,1,2,3,0,0,0,0] }]; - let arguments = (ins F64Tensor:$input); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input); + let results = (outs F32Tensor); // Enable registering canonicalization patterns with this operation. // let hasCanonicalizer = 1; @@ -1869,9 +1871,9 @@ def FIRFilterResSymmOptimizedOp : DSP_Op<"FIRFilterResSymmOptimized" , Basically, we are trying to reduce the number of load/store operations by half -- so that we can reduce the operations }]; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs); //working -- F64 - let results = (outs F64Tensor); - // let results = (outs I64); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs); //working -- F32 + let results = (outs F32Tensor); + // let results = (outs I32); // Indicate that the operation has a custom parser and printer method. // let hasCustomAssemblyFormat = 1; @@ -1903,8 +1905,8 @@ def LengthOp : DSP_Op<"len" , ex: x[n] = [2,1,3,2,4], len(x) will be 5 }]; - let arguments = (ins F64Tensor:$input); //working -- F64 - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input); //working -- F32 + let results = (outs F32Tensor); // Indicate that the operation has a custom parser and printer method. // let hasCustomAssemblyFormat = 1; @@ -1937,8 +1939,8 @@ def ReverseInputOp : DSP_Op<"reverseInput" , ex: x[n] = [1,2,3,4], y[n] = [4,3,2,1] }]; - let arguments = (ins F64Tensor:$input); //working -- F64 - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input); //working -- F32 + let results = (outs F32Tensor); // Indicate that the operation has a custom parser and printer method. // let hasCustomAssemblyFormat = 1; @@ -1975,8 +1977,8 @@ def PaddingOp : DSP_Op<"padding", y[n] = [1,2,3,4,0,0,0] }]; - let arguments = (ins F64Tensor:$input, F64Tensor:$PadValue, F64Tensor:$PadLen); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input, F32Tensor:$PadValue, F32Tensor:$PadLen); + let results = (outs F32Tensor); /// Indicate that the operation has a custom parser and printer method. // let hasCustomAssemblyFormat = 1; // let assemblyFormat = [{ @@ -2012,9 +2014,9 @@ def FIRFilterYSymmOptimizedOp : DSP_Op<"FIRFilterYSymmOptimized" , So, we are reducing the number of outer loops -- }]; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs); //working -- F64 - let results = (outs F64Tensor); - // let results = (outs I64); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs); //working -- F32 + let results = (outs F32Tensor); + // let results = (outs I32); // Indicate that the operation has a custom parser and printer method. // let hasCustomAssemblyFormat = 1; @@ -2053,9 +2055,9 @@ def FFT1DRealSymmOp : DSP_Op<"fft1DRealSymm", The shapes of the tensor operands are expected to match. }]; - let arguments = (ins F64Tensor:$input); - let results = (outs F64Tensor:$real); //(ins F64Tensor:$lhs, F64Tensor:$rhs); - // let results = (outs F64Tensor:$real); + let arguments = (ins F32Tensor:$input); + let results = (outs F32Tensor:$real); //(ins F32Tensor:$lhs, F32Tensor:$rhs); + // let results = (outs F32Tensor:$real); // let assemblyFormat = [{ // `(` $input `:` type($input) `)` attr-dict `to` type(results) // }]; @@ -2096,9 +2098,9 @@ def FFT1DImgConjSymmOp : DSP_Op<"fft1DimgConjSymm", The shapes of the tensor operands are expected to match. }]; - let arguments = (ins F64Tensor:$input); - let results = (outs F64Tensor:$real); //(ins F64Tensor:$lhs, F64Tensor:$rhs); - // let results = (outs F64Tensor:$real); + let arguments = (ins F32Tensor:$input); + let results = (outs F32Tensor:$real); //(ins F32Tensor:$lhs, F32Tensor:$rhs); + // let results = (outs F32Tensor:$real); // let assemblyFormat = [{ // `(` $input `:` type($input) `)` attr-dict `to` type(results) // }]; @@ -2131,8 +2133,8 @@ def ShiftRightOp : DSP_Op<"shiftRight", [Pure , DeclareOpInterfaceMethods @@ -2221,9 +2223,9 @@ def ThresholdUpOp : DSP_Op<"thresholdUp", Converts all the values above threhold to 1 if returnoriginal is false, returns original value if returnoriginal is true else 0 }]; - let arguments = (ins F64Tensor:$input, F64Tensor:$threshold, F64Tensor:$returnoriginal); + let arguments = (ins F32Tensor:$input, F32Tensor:$threshold, F32Tensor:$returnoriginal); - let results = (outs F64Tensor:$output); + let results = (outs F32Tensor:$output); let builders = [ OpBuilder<(ins "Value":$input, "Value":$threshold, "Value":$returnoriginal)> @@ -2243,9 +2245,9 @@ def GenerateDTMFOp : DSP_Op<"generateDtmf", Converts the digit into a signal. }]; - let arguments = (ins F64Tensor:$digit, F64Tensor:$duration, F64Tensor:$fs); + let arguments = (ins F32Tensor:$digit, F32Tensor:$duration, F32Tensor:$fs); - let results = (outs F64Tensor:$output); + let results = (outs F32Tensor:$output); let builders = [ OpBuilder<(ins "Value":$digit, "Value":$duration, "Value":$fs)> @@ -2264,9 +2266,9 @@ def FFTFreqOp : DSP_Op<"fftfreq", Generates frequency bins for fft. }]; - let arguments = (ins F64Tensor:$length, F64Tensor:$distance); + let arguments = (ins F32Tensor:$length, F32Tensor:$distance); - let results = (outs F64Tensor:$output); + let results = (outs F32Tensor:$output); let builders = [ OpBuilder<(ins "Value":$length, "Value":$distance)> @@ -2285,9 +2287,9 @@ def FindDominantPeaksOp : DSP_Op<"findDominantPeaks", Designed for the DTMF Application. }]; - let arguments = (ins F64Tensor:$frequencies, F64Tensor:$magnitudes); + let arguments = (ins F32Tensor:$frequencies, F32Tensor:$magnitudes); - let results = (outs F64Tensor:$output); + let results = (outs F32Tensor:$output); let builders = [ OpBuilder<(ins "Value":$frequencies, "Value":$magnitudes)> @@ -2306,9 +2308,9 @@ def RecoverDTMFDigitOp : DSP_Op<"recoverDtmfDigit", -----------------------------. }]; - let arguments = (ins F64Tensor:$frequencies, F64Tensor:$freqPairs); + let arguments = (ins F32Tensor:$frequencies, F32Tensor:$freqPairs); - let results = (outs F64Tensor:$output); + let results = (outs F32Tensor:$output); let builders = [ OpBuilder<(ins "Value":$frequencies, "Value":$freqPairs)> @@ -2329,9 +2331,9 @@ def FFTCombineOp : DSP_Op<"fftCombine", array representing the magnitudes of the corresponding complex values. }]; - let arguments = (ins F64Tensor:$real, F64Tensor:$imag); + let arguments = (ins F32Tensor:$real, F32Tensor:$imag); - let results = (outs F64Tensor:$output); + let results = (outs F32Tensor:$output); let builders = [ OpBuilder<(ins "Value":$real, "Value":$imag)> @@ -2351,9 +2353,9 @@ def GenerateVoiceSignatureOp : DSP_Op<"generateVoiceSignature", the sampling frequency, and generate the voice signature of the speaker. }]; - let arguments = (ins F64Tensor:$f1, F64Tensor:$f2, F64Tensor:$duration, F64Tensor:$fs); + let arguments = (ins F32Tensor:$f1, F32Tensor:$f2, F32Tensor:$duration, F32Tensor:$fs); - let results = (outs F64Tensor:$output); + let results = (outs F32Tensor:$output); let builders = [ OpBuilder<(ins "Value":$f1, "Value":$f2, "Value":$duration, "Value":$fs)> @@ -2372,9 +2374,9 @@ def SqrtOp : DSP_Op<"sqrt", Takes the element wise square root of the tensor. }]; - let arguments = (ins F64Tensor:$input); + let arguments = (ins F32Tensor:$input); - let results = (outs F64Tensor:$output); + let results = (outs F32Tensor:$output); let builders = [ OpBuilder<(ins "Value":$input)> @@ -2393,9 +2395,9 @@ def QamModulateRealOp : DSP_Op<"qam_modulate_real", Performs a digital modulation on input tensor. }]; - let arguments = (ins F64Tensor:$signal); + let arguments = (ins F32Tensor:$signal); - let results = (outs F64Tensor:$real); + let results = (outs F32Tensor:$real); let builders = [ @@ -2416,9 +2418,9 @@ def QamModulateImgOp : DSP_Op<"qam_modulate_imagine", Performs a digital modulation on input tensor. }]; - let arguments = (ins F64Tensor:$signal); + let arguments = (ins F32Tensor:$signal); - let results = (outs F64Tensor:$imagine); + let results = (outs F32Tensor:$imagine); let builders = [ @@ -2441,9 +2443,9 @@ def QamDemodulateOp : DSP_Op<"qam_demodulate", Returns the decoded binary output. }]; - let arguments = (ins F64Tensor:$real, F64Tensor:$imagine); + let arguments = (ins F32Tensor:$real, F32Tensor:$imagine); - let results = (outs F64Tensor:$output); + let results = (outs F32Tensor:$output); let builders = [ OpBuilder<(ins "Value":$real, "Value":$imagine)> @@ -2479,8 +2481,8 @@ def FindPeaksOp : DSP_Op<"find_peaks", [Pure , DeclareOpInterfaceMethods + OpBuilder<(ins "int32_t":$antennas, "int32_t":$freq, "Value":$time, "Value":$weights)> ]; let hasVerifier = 1; @@ -2535,9 +2537,9 @@ def SpaceModulateOp : DSP_Op<"space_modulate", Takes in string input and convert it to binary. }]; - let arguments = (ins F64Tensor:$signal); + let arguments = (ins F32Tensor:$signal); - let results = (outs F64Tensor:$output); + let results = (outs F32Tensor:$output); let builders = [ OpBuilder<(ins "Value":$signal)> @@ -2557,9 +2559,9 @@ def SpaceDemodulateOp : DSP_Op<"space_demodulate", Takes in binary input and convert it to string. }]; - let arguments = (ins F64Tensor:$binary); + let arguments = (ins F32Tensor:$binary); - let results = (outs F64Tensor:$output); + let results = (outs F32Tensor:$output); let builders = [ OpBuilder<(ins "Value":$binary)> @@ -2580,9 +2582,9 @@ def SpaceErrCorrectionOp : DSP_Op<"space_err_correction", Remove noise operation for signal transmission in space. }]; - let arguments = (ins F64Tensor:$signal); + let arguments = (ins F32Tensor:$signal); - let results = (outs F64Tensor:$output); + let results = (outs F32Tensor:$output); let builders = [ OpBuilder<(ins "Value":$signal)> @@ -2602,8 +2604,8 @@ def MaxOp : DSP_Op<"max", [Pure , DeclareOpInterfaceMethods use the provided length }]; - let arguments = (ins F64Tensor:$input, F64Tensor:$length); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input, F32Tensor:$length); + let results = (outs F32Tensor); let builders = [ OpBuilder<(ins "Value":$input, "Value":$length)> @@ -2669,8 +2671,8 @@ def DiffOp : DSP_Op<"diff", [Pure , DeclareOpInterfaceMethods use the provided length }]; - let arguments = (ins F64Tensor:$input, F64Tensor:$length); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input, F32Tensor:$length); + let results = (outs F32Tensor); let builders = [ OpBuilder<(ins "Value":$input, "Value":$length)> @@ -2692,8 +2694,8 @@ def AbsOp : DSP_Op<"abs", [Pure , DeclareOpInterfaceMethods @@ -2711,11 +2713,11 @@ def ArgMaxOp : DSP_Op<"argmax", [Pure , DeclareOpInterfaceMethods + OpBuilder<(ins "Value":$input, "int32_t":$axis)> ]; } //===----------------------------------------------------------------------===// @@ -2728,8 +2730,8 @@ def NormalizeOp : DSP_Op<"normalize", [Pure , DeclareOpInterfaceMethods @@ -2750,9 +2752,9 @@ def NormLMSFilterResponseOptimizeOp : DSP_Op<"norm_LMSFilterResponse_opt", norm + lmsfilter }]; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs, F64Tensor:$mu, F64Tensor:$filterLen); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs, F32Tensor:$mu, F32Tensor:$filterLen); - let results = (outs F64Tensor); + let results = (outs F32Tensor); let builders = [ OpBuilder<(ins "Value":$lhs, "Value":$rhs, "Value":$mu, "Value":$filterLen)> @@ -2768,8 +2770,8 @@ def NormLMSFilterResponseOptimizeOp : DSP_Op<"norm_LMSFilterResponse_opt", def Median2SlidingOptimizedOp : DSP_Op<"median2slidingOp", [Pure, DeclareOpInterfaceMethods]> { - let arguments = (ins F64Tensor:$input); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input); + let results = (outs F32Tensor); let builders = [ OpBuilder<(ins "Value":$input)> @@ -2793,8 +2795,8 @@ def FIRFilterResSymmThresholdUpOptimizedOp : DSP_Op<"FIRFilterResSymmThresholdUp Basically, we are trying to reduce the number of load/store operations by half -- so that we can reduce the operations }]; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs, F64Tensor:$threshold, F64Tensor:$returnoriginal); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs, F32Tensor:$threshold, F32Tensor:$returnoriginal); + let results = (outs F32Tensor); let builders = [ OpBuilder<(ins "Value":$lhs, "Value":$rhs, "Value":$threshold, "Value":$returnoriginal)> @@ -2814,8 +2816,8 @@ def FFTOp : DSP_Op<"fft", [Pure, DeclareOpInterfaceMethods @@ -2834,8 +2836,8 @@ def FFTAbsOp : DSP_Op<"FFTAbsOp", [Pure, DeclareOpInterfaceMethods @@ -2852,8 +2854,8 @@ def DFTAbsOp : DSP_Op<"DFTAbsOp", [Pure, DeclareOpInterfaceMethods @@ -2870,8 +2872,8 @@ def DFTAbsThresholdUpOp : DSP_Op<"DFTAbsThresholdUpOp", [Pure, DeclareOpInterfac ------------------ }]; - let arguments = (ins F64Tensor:$input, F64Tensor:$threshold, F64Tensor:$returnoriginal); - let results = (outs F64Tensor:$amplitude); + let arguments = (ins F32Tensor:$input, F32Tensor:$threshold, F32Tensor:$returnoriginal); + let results = (outs F32Tensor:$amplitude); let builders = [ OpBuilder<(ins "Value":$input, "Value":$threshold, "Value":$returnoriginal)> @@ -2890,8 +2892,8 @@ def CorrelateOp : DSP_Op<"correlate", [Pure , DeclareOpInterfaceMethods]> { let summary = "This one access ranked tensor at idx and sets signle tensor with or without dimension."; - let arguments = (ins F64Tensor:$input, F64Tensor:$indx , F64Tensor:$val); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$input, F32Tensor:$indx , F32Tensor:$val); + let results = (outs F32Tensor); let builders = [ OpBuilder<(ins "Value":$input, "Value":$indx, "Value":$val)> @@ -2938,8 +2940,8 @@ def Correl2MaxOptimizedOp : DSP_Op<"correl2max", [Pure , DeclareOpInterfaceMetho This operation fuses loops for correlate and max. }]; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs); + let results = (outs F32Tensor); let builders = [ OpBuilder<(ins "Value":$lhs, "Value":$rhs)> @@ -2954,8 +2956,8 @@ def LMSFilterResponse2GainOp : DSP_Op<"lmsFilterResponse2gain", [Pure, DeclareOpInterfaceMethods]> { let summary = "Fusing loop for LMSFilterResponseOp and GainOp"; - let arguments = (ins F64Tensor:$lhs, F64Tensor:$rhs, F64Tensor:$mu, F64Tensor:$filterLen, F64Tensor:$gain); - let results = (outs F64Tensor); + let arguments = (ins F32Tensor:$lhs, F32Tensor:$rhs, F32Tensor:$mu, F32Tensor:$filterLen, F32Tensor:$gain); + let results = (outs F32Tensor); let builders = [ OpBuilder<(ins "Value":$lhs, "Value":$rhs, "Value":$mu, "Value":$filterLen, "Value":$gain)> @@ -2965,4 +2967,3 @@ def LMSFilterResponse2GainOp : DSP_Op<"lmsFilterResponse2gain", #endif // DSP - diff --git a/mlir/include/mlir/IR/CommonAttrConstraints.td b/mlir/include/mlir/IR/CommonAttrConstraints.td index 0d69bb0717a5..61d4bdfdb8bb 100644 --- a/mlir/include/mlir/IR/CommonAttrConstraints.td +++ b/mlir/include/mlir/IR/CommonAttrConstraints.td @@ -510,6 +510,7 @@ class FloatElementsAttr : ElementsAttrBase< } def F64ElementsAttr : FloatElementsAttr<64>; +def F32ElementsAttr : FloatElementsAttr<32>; // A `width`-bit floating point elements attribute. The attribute should be // ranked and has a shape as specified in `dims`. diff --git a/mlir/lib/Conversion/DSPToAffine/DSPToAffine.cpp b/mlir/lib/Conversion/DSPToAffine/DSPToAffine.cpp index 4098505cfd0c..ad3559cf9415 100644 --- a/mlir/lib/Conversion/DSPToAffine/DSPToAffine.cpp +++ b/mlir/lib/Conversion/DSPToAffine/DSPToAffine.cpp @@ -12249,4 +12249,4 @@ void mlir::dsp::populateDSPToAffineConversionPatterns(RewritePatternSet &pattern DFTAbsOpLowering, DFTAbsThresholdUpOpLowering, ArgMaxOpLowering, CorrelateOpLowering, SetSingleElemAtIdxOpLowering, Correl2MaxOptimizedOpLowering, LMSFilterResponse2GainOpLowering>(ctx); // clang-format on -} +} \ No newline at end of file diff --git a/mlir/lib/Dialect/DSP/IR/DSPDialect.cpp b/mlir/lib/Dialect/DSP/IR/DSPDialect.cpp index 2b4aacfb7367..7868c3932377 100644 --- a/mlir/lib/Dialect/DSP/IR/DSPDialect.cpp +++ b/mlir/lib/Dialect/DSP/IR/DSPDialect.cpp @@ -170,7 +170,7 @@ static mlir::ParseResult parseBinaryOp(mlir::OpAsmParser &parser, // If the type is a function type, it contains the input and result types of // this operation. - if (FunctionType funcType = llvm::dyn_cast(type)) { + if (FunctionType funcType = mlir::dyn_cast(type)) { if (parser.resolveOperands(operands, funcType.getInputs(), operandsLoc, result.operands)) return mlir::failure(); @@ -288,7 +288,13 @@ mlir::LogicalResult ConstantOp::verify() { void ModuloOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value lhs, mlir::Value rhs) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = lhs.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({lhs, rhs}); } @@ -300,7 +306,13 @@ void ModuloOp::inferShapes() { getResult().setType(getLhs().getType()); } void AddOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value lhs, mlir::Value rhs) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = lhs.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({lhs, rhs}); } @@ -330,8 +342,8 @@ bool CastOp::areCastCompatible(TypeRange inputs, TypeRange outputs) { if (inputs.size() != 1 || outputs.size() != 1) return false; // The inputs must be Tensors with the same element type. - TensorType input = llvm::dyn_cast(inputs.front()); - TensorType output = llvm::dyn_cast(outputs.front()); + TensorType input = mlir::dyn_cast(inputs.front()); + TensorType output = mlir::dyn_cast(outputs.front()); if (!input || !output || input.getElementType() != output.getElementType()) return false; // The shape is required to match if both types are ranked. @@ -381,7 +393,13 @@ void FuncOp::print(mlir::OpAsmPrinter &p) { void GenericCallOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, StringRef callee, ArrayRef arguments) { // Generic call always returns an unranked Tensor initially. - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = arguments[0].getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands(arguments); state.addAttribute("callee", mlir::SymbolRefAttr::get(builder.getContext(), callee)); @@ -415,7 +433,13 @@ MutableOperandRange GenericCallOp::getArgOperandsMutable() { void MulOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value lhs, mlir::Value rhs) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = lhs.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({lhs, rhs}); } @@ -436,7 +460,13 @@ void MulOp::inferShapes() { getResult().setType(getLhs().getType()); } void DivOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value lhs, mlir::Value rhs) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = lhs.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({lhs, rhs}); } @@ -457,7 +487,13 @@ void DivOp::inferShapes() { getResult().setType(getLhs().getType()); } void BitwiseAndOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value lhs, mlir::Value rhs) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = lhs.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({lhs, rhs}); } @@ -516,19 +552,25 @@ mlir::LogicalResult ReturnOp::verify() { void TransposeOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value value) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = value.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands(value); } void TransposeOp::inferShapes() { - auto arrayTy = llvm::cast(getOperand().getType()); + auto arrayTy = mlir::dyn_cast(getOperand().getType()); SmallVector dims(llvm::reverse(arrayTy.getShape())); getResult().setType(RankedTensorType::get(dims, arrayTy.getElementType())); } mlir::LogicalResult TransposeOp::verify() { - auto inputType = llvm::dyn_cast(getOperand().getType()); - auto resultType = llvm::dyn_cast(getType()); + auto inputType = mlir::dyn_cast(getOperand().getType()); + auto resultType = mlir::dyn_cast(getType()); if (!inputType || !resultType) return mlir::success(); @@ -551,7 +593,13 @@ void DelayOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, // // state.addTypes(UnrankedTensorType::get(builder.getF64Type()), // builder.getI32Type()); - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); // working + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = lhs.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); // working state.addOperands({lhs, rhs}); // state.addOperands(value); } @@ -590,7 +638,13 @@ void GainOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, // state.addTypes(UnrankedTensorType::get(builder.getF64Type())); // state.addTypes({UnrankedTensorType::get(builder.getF64Type()), // builder.getF64Type()}); //working - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = lhs.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({lhs, rhs}); // state.addOperands({rhs}); // state.addTypes(); @@ -629,7 +683,13 @@ void GainOp::inferShapes() { getResult().setType(getLhs().getType()); } void SubOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value lhs, mlir::Value rhs) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = lhs.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({lhs, rhs}); } @@ -650,7 +710,13 @@ void SubOp::inferShapes() { getResult().setType(getLhs().getType()); } void FFTRealOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value lhs) { - state.addTypes(lhs.getType()); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = lhs.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({lhs}); } @@ -662,7 +728,13 @@ void FFTRealOp::inferShapes() { getResult().setType(getLhs().getType()); } void FFTImagOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value lhs) { - state.addTypes(lhs.getType()); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = lhs.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({lhs}); } @@ -674,7 +746,13 @@ void FFTImagOp::inferShapes() { getResult().setType(getLhs().getType()); } void MatmulOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value lhs, mlir::Value rhs) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = lhs.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({lhs, rhs}); } @@ -734,7 +812,13 @@ void MatmulOp::inferShapes() { void FindPeaksOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value signal, mlir::Value height, mlir::Value distance) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = signal.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({signal, height, distance}); } @@ -772,7 +856,13 @@ void FindPeaksOp::inferShapes() { void MaxOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value input) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = input.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({input}); } @@ -796,7 +886,13 @@ void MaxOp::inferShapes() { void MeanOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value input, mlir::Value length) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = input.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({input, length}); } @@ -817,7 +913,13 @@ void MeanOp::inferShapes() { void DiffOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value input, mlir::Value length) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = input.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({input, length}); } @@ -840,7 +942,13 @@ void DiffOp::inferShapes() { void AbsOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value input) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = input.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({input}); } @@ -850,12 +958,7 @@ void AbsOp::inferShapes() { getResult().setType(getInput().getType()); } // ArgMaxOp //===----------------------------------------------------------------------===// -void ArgMaxOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, - mlir::Value input, int64_t axis) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); - state.addAttribute("axis", builder.getI64IntegerAttr(axis)); - state.addOperands({input}); -} + void ArgMaxOp::inferShapes() { @@ -886,15 +989,21 @@ void ArgMaxOp::inferShapes() { void PowOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value lhs, mlir::Value rhs) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = lhs.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({lhs, rhs}); } void PowOp::inferShapes() { getResult().setType(getLhs().getType()); } mlir::LogicalResult PowOp::verify() { - auto lhsType = llvm::dyn_cast(getLhs().getType()); - auto resultType = llvm::dyn_cast(getType()); + auto lhsType = mlir::dyn_cast(getLhs().getType()); + auto resultType = mlir::dyn_cast(getType()); if (!lhsType || !resultType) return mlir::success(); @@ -916,7 +1025,13 @@ mlir::LogicalResult PowOp::verify() { void zeroCrossCountOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value lhs) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = lhs.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); // state.addTypes(builder.getF64Type())); // state.addTypes(builder.getI64Type()); state.addOperands({lhs}); @@ -935,7 +1050,13 @@ void zeroCrossCountOp::inferShapes() { void FIRFilterResponseOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value lhs, mlir::Value rhs) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = lhs.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({lhs, rhs}); } @@ -989,7 +1110,13 @@ mlir::LogicalResult FIRFilterResponseOp::verify() { void MedianFilterOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value value) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = value.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands(value); } @@ -997,7 +1124,7 @@ void MedianFilterOp::inferShapes() { // for each rank // Get the shape/size of input // output size = input_size - 2 - auto inputType = llvm::dyn_cast(getOperand().getType()); + auto inputType = mlir::dyn_cast(getOperand().getType()); auto shapeOfInput = inputType.getShape(); @@ -1022,7 +1149,13 @@ void MedianFilterOp::inferShapes() { void SlidingWindowAvgOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value value) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = value.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands(value); } @@ -1030,7 +1163,7 @@ void SlidingWindowAvgOp::inferShapes() { // for each rank // Get the shape/size of input // output size = input_size - 2 - auto inputType = llvm::dyn_cast(getOperand().getType()); + auto inputType = mlir::dyn_cast(getOperand().getType()); auto shapeOfInput = inputType.getShape(); @@ -1076,7 +1209,13 @@ mlir::LogicalResult SlidingWindowAvgOp::verify() { void DownsamplingOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::Value lhs, mlir::Value rhs) { - state.addTypes(UnrankedTensorType::get(builder.getF64Type())); + mlir::Type elementType = builder.getF64Type(); + if (auto tensorType = lhs.getType().dyn_cast()) { + elementType = tensorType.getElementType(); + if (!elementType.isF32() && !elementType.isF64()) + elementType = builder.getF64Type(); + } + state.addTypes(UnrankedTensorType::get(elementType)); state.addOperands({lhs, rhs}); } @@ -1488,7 +1627,7 @@ void DCTOp::inferShapes() { mlir::LogicalResult DCTOp::verify() { // DEBUG_PRINT_NO_ARGS() ; - auto inputType = llvm::dyn_cast(getOperand().getType()); + auto inputType = mlir::dyn_cast(getOperand().getType()); auto inputRank = inputType.getRank(); // llvm::errs() << "inputRank: " << inputRank << " alphaValueRank: " << @@ -1939,7 +2078,7 @@ void Median2SlidingOptimizedOp::inferShapes() { // for each rank // Get the shape/size of input // output size = input_size - 4 - auto inputType = llvm::dyn_cast(getOperand().getType()); + auto inputType = mlir::dyn_cast(getOperand().getType()); auto shapeOfInput = inputType.getShape(); @@ -2974,8 +3113,8 @@ void Conv2DOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, state.addOperands({input, weight, bias}); } void Conv2DOp::inferShapes() { - auto inputType = llvm::dyn_cast(getInput().getType()); - auto kernelType = llvm::dyn_cast(getKernel().getType()); + auto inputType = mlir::dyn_cast(getInput().getType()); + auto kernelType = mlir::dyn_cast(getKernel().getType()); int64_t IH = inputType.getShape()[0]; int64_t IW = inputType.getShape()[1]; @@ -2989,9 +3128,9 @@ void Conv2DOp::inferShapes() { mlir::LogicalResult Conv2DOp::verify() { - auto inputType = llvm::dyn_cast(getInput().getType()); - auto kernelType = llvm::dyn_cast(getKernel().getType()); - auto biasType = llvm::dyn_cast(getBias().getType()); + auto inputType = mlir::dyn_cast(getInput().getType()); + auto kernelType = mlir::dyn_cast(getKernel().getType()); + auto biasType = mlir::dyn_cast(getBias().getType()); if (!inputType) { llvm::errs() << "expect a ranked tensor for input, get " << getInput(); @@ -3067,9 +3206,9 @@ void ThresholdUpOp::inferShapes() { getResult().setType(getInput().getType()); } //===----------------------------------------------------------------------===// mlir::LogicalResult GenerateDTMFOp::verify() { - auto digitType = llvm::dyn_cast(getDigit().getType()); - auto durationType = llvm::dyn_cast(getDuration().getType()); - auto fsType = llvm::dyn_cast(getFs().getType()); + auto digitType = mlir::dyn_cast(getDigit().getType()); + auto durationType = mlir::dyn_cast(getDuration().getType()); + auto fsType = mlir::dyn_cast(getFs().getType()); if (!digitType) { return emitError() << "Digit must be a ranked tensor"; @@ -3124,9 +3263,9 @@ void GenerateDTMFOp::build(mlir::OpBuilder &builder, state.addOperands({digit, duration, fs}); } void GenerateDTMFOp::inferShapes() { - auto digitType = llvm::dyn_cast(getDigit().getType()); - auto durationType = llvm::dyn_cast(getDuration().getType()); - auto fsType = llvm::dyn_cast(getFs().getType()); + auto digitType = mlir::dyn_cast(getDigit().getType()); + auto durationType = mlir::dyn_cast(getDuration().getType()); + auto fsType = mlir::dyn_cast(getFs().getType()); // auto digitElementType = digitType.getElementType(); auto duration = getDuration(); @@ -3161,7 +3300,7 @@ void FFTFreqOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, mlir::LogicalResult FFTFreqOp::verify() { return mlir::success(); } void FFTFreqOp::inferShapes() { - auto lengthType = llvm::dyn_cast(getLength().getType()); + auto lengthType = mlir::dyn_cast(getLength().getType()); auto length = getLength(); auto lengthConst = length.getDefiningOp(); auto lengthValue = lengthConst.getValue(); @@ -3187,7 +3326,7 @@ void FindDominantPeaksOp::build(mlir::OpBuilder &builder, void FindDominantPeaksOp::inferShapes() { auto frequenciesType = - llvm::dyn_cast(getFrequencies().getType()); + mlir::dyn_cast(getFrequencies().getType()); SmallVector resultShape{2}; auto resultType = RankedTensorType::get(resultShape, frequenciesType.getElementType()); @@ -3196,9 +3335,9 @@ void FindDominantPeaksOp::inferShapes() { mlir::LogicalResult FindDominantPeaksOp::verify() { auto frequenciesType = - llvm::dyn_cast(getFrequencies().getType()); + mlir::dyn_cast(getFrequencies().getType()); auto magnitudesType = - llvm::dyn_cast(getMagnitudes().getType()); + mlir::dyn_cast(getMagnitudes().getType()); return mlir::success(); } @@ -3215,7 +3354,7 @@ void RecoverDTMFDigitOp::build(mlir::OpBuilder &builder, void RecoverDTMFDigitOp::inferShapes() { auto frequenciesType = - llvm::dyn_cast(getFrequencies().getType()); + mlir::dyn_cast(getFrequencies().getType()); SmallVector resultShape{1}; auto resultType = RankedTensorType::get(resultShape, frequenciesType.getElementType()); @@ -3224,9 +3363,9 @@ void RecoverDTMFDigitOp::inferShapes() { mlir::LogicalResult RecoverDTMFDigitOp::verify() { auto frequenciesType = - llvm::dyn_cast(getFrequencies().getType()); + mlir::dyn_cast(getFrequencies().getType()); auto freqPairsType = - llvm::dyn_cast(getFreqPairs().getType()); + mlir::dyn_cast(getFreqPairs().getType()); return mlir::success(); } @@ -3241,8 +3380,8 @@ void FFTCombineOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, } mlir::LogicalResult FFTCombineOp::verify() { - auto realType = llvm::dyn_cast(getReal().getType()); - auto imagType = llvm::dyn_cast(getImag().getType()); + auto realType = mlir::dyn_cast(getReal().getType()); + auto imagType = mlir::dyn_cast(getImag().getType()); auto realNoOfElements = realType.getNumElements(); auto imagNoOfElements = imagType.getNumElements(); @@ -3270,10 +3409,10 @@ void GenerateVoiceSignatureOp::build(mlir::OpBuilder &builder, } mlir::LogicalResult GenerateVoiceSignatureOp::verify() { - auto f1Type = llvm::dyn_cast(getF1().getType()); - auto f2Type = llvm::dyn_cast(getF2().getType()); - auto durationType = llvm::dyn_cast(getDuration().getType()); - auto fsType = llvm::dyn_cast(getFs().getType()); + auto f1Type = mlir::dyn_cast(getF1().getType()); + auto f2Type = mlir::dyn_cast(getF2().getType()); + auto durationType = mlir::dyn_cast(getDuration().getType()); + auto fsType = mlir::dyn_cast(getFs().getType()); if (!f1Type) { return emitError() << "f1 must be a ranked tensor"; @@ -3316,8 +3455,8 @@ mlir::LogicalResult GenerateVoiceSignatureOp::verify() { } void GenerateVoiceSignatureOp::inferShapes() { - auto durationType = llvm::dyn_cast(getDuration().getType()); - auto fsType = llvm::dyn_cast(getFs().getType()); + auto durationType = mlir::dyn_cast(getDuration().getType()); + auto fsType = mlir::dyn_cast(getFs().getType()); // auto digitElementType = digitType.getElementType(); auto duration = getDuration(); @@ -3350,7 +3489,7 @@ void SqrtOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, } mlir::LogicalResult SqrtOp::verify() { - auto inputType = llvm::dyn_cast(getInput().getType()); + auto inputType = mlir::dyn_cast(getInput().getType()); return mlir::success(); } @@ -3368,7 +3507,7 @@ void QamDemodulateOp::build(mlir::OpBuilder &builder, } void QamDemodulateOp::inferShapes() { - auto realType = llvm::dyn_cast(getReal().getType()); + auto realType = mlir::dyn_cast(getReal().getType()); auto realShape = realType.getShape(); SmallVector outputShape(realShape); @@ -3380,8 +3519,8 @@ void QamDemodulateOp::inferShapes() { } mlir::LogicalResult QamDemodulateOp::verify() { - auto realType = llvm::dyn_cast(getReal().getType()); - auto imagineType = llvm::dyn_cast(getImagine().getType()); + auto realType = mlir::dyn_cast(getReal().getType()); + auto imagineType = mlir::dyn_cast(getImagine().getType()); return mlir::success(); } @@ -3398,7 +3537,7 @@ void QamModulateRealOp::build(mlir::OpBuilder &builder, state.addOperands({signal}); } void QamModulateRealOp::inferShapes() { - auto signalType = llvm::dyn_cast(getSignal().getType()); + auto signalType = mlir::dyn_cast(getSignal().getType()); auto signalShape = signalType.getShape(); SmallVector outputShape(signalShape); @@ -3412,7 +3551,7 @@ void QamModulateRealOp::inferShapes() { mlir::LogicalResult QamModulateRealOp::verify() { - // auto signalType = llvm::dyn_cast(getSignal().getType()); + // auto signalType = mlir::dyn_cast(getSignal().getType()); // // if(!signalType) { // llvm::errs() << "expect a ranked tensor for signal input, get " << @@ -3441,7 +3580,7 @@ void QamModulateImgOp::build(mlir::OpBuilder &builder, state.addOperands({signal}); } void QamModulateImgOp::inferShapes() { - auto signalType = llvm::dyn_cast(getSignal().getType()); + auto signalType = mlir::dyn_cast(getSignal().getType()); auto signalShape = signalType.getShape(); SmallVector outputShape(signalShape); @@ -3462,15 +3601,6 @@ mlir::LogicalResult QamModulateImgOp::verify() { // BeamFormOp //===----------------------------------------------------------------------===// -void BeamFormOp::build(mlir::OpBuilder &builder, mlir::OperationState &state, - int64_t antennas, int64_t freq, mlir::Value time, - mlir::Value weights) { - state.addTypes({UnrankedTensorType::get(builder.getF64Type())}); - state.addAttribute("antennas", builder.getI64IntegerAttr(antennas)); - state.addAttribute("freq", builder.getI64IntegerAttr(freq)); - state.addOperands({time, weights}); -} - void BeamFormOp::inferShapes() { getResult().setType(getTime().getType()); } mlir::LogicalResult BeamFormOp::verify() { @@ -3757,4 +3887,4 @@ void LMSFilterResponse2GainOp::inferShapes() { //===----------------------------------------------------------------------===// #define GET_OP_CLASSES -#include "mlir/Dialect/DSP/IR/DSP.cpp.inc" +#include "mlir/Dialect/DSP/IR/DSP.cpp.inc" \ No newline at end of file diff --git a/mlir/lib/Dialect/DSP/IR/ToyCombine.cpp b/mlir/lib/Dialect/DSP/IR/ToyCombine.cpp index 977b3380b1ec..f9815ef35a28 100644 --- a/mlir/lib/Dialect/DSP/IR/ToyCombine.cpp +++ b/mlir/lib/Dialect/DSP/IR/ToyCombine.cpp @@ -457,9 +457,9 @@ struct SimplifyGainwZero : public mlir::OpRewritePattern { DenseElementsAttr InputValueFrmgainOp = constant_Op0.getValue(); int64_t inputSize = InputValueFrmgainOp.size(); - // Define the type of the tensor (tensor). + // Define the type of the tensor (tensor). RankedTensorType tensorType = - RankedTensorType::get({inputSize}, rewriter.getF64Type()); + RankedTensorType::get({inputSize}, rewriter.getF32Type()); // Create a constant operation with the specified value and type. DenseElementsAttr zerovalue = DenseElementsAttr::get(tensorType, 0.0); @@ -621,10 +621,10 @@ struct SimplifyFIRFilterRespnseWithSymmFilter // label: pass 1st // Pseudo code: // if the FFT1DRealOp & FFT1DImgOp has same input then replace them with single -// %4 = "dsp.fft1dreal"(%3) : (tensor<10xf64>) -> tensor<10xf64> -// %5 = "dsp.fft1dimg"(%3) : (tensor<10xf64>) -> tensor<10xf64> -// replace with %4, %5 = "dsp.fft1d"(%3) : (tensor<10xf64>) -> (tensor<10xf64 , -// tensor<10xf64)> +// %4 = "dsp.fft1dreal"(%3) : (tensor<10xf32>) -> tensor<10xf32> +// %5 = "dsp.fft1dimg"(%3) : (tensor<10xf32>) -> tensor<10xf32> +// replace with %4, %5 = "dsp.fft1d"(%3) : (tensor<10xf32>) -> (tensor<10xf32 , +// tensor<10xf32)> // // Define the canonicalization pattern. struct SimplifyFFTRealAndImg : public OpRewritePattern { @@ -656,9 +656,9 @@ struct SimplifyFFTRealAndImg : public OpRewritePattern { // Pseudo-Code // Find FIRFilterResponse & reverseInput -// %1 = "dsp.reverseInput"(%0) : (tensor<4xf64>) -> tensor<*xf64> -// %2 = "dsp.FIRFilterResponse"(%0, %1) : (tensor<4xf64>, tensor<*xf64>) -> -// tensor<*xf64> +// %1 = "dsp.reverseInput"(%0) : (tensor<4xf32>) -> tensor<*xf32> +// %2 = "dsp.FIRFilterResponse"(%0, %1) : (tensor<4xf32>, tensor<*xf32>) -> +// tensor<*xf32> // For above pattern , replace dsp.FIRFilterResponse with // FIRFilterYSymmOptimized %1 = "dsp.reverseInput"(%0) result2 = // dsp.FIRFilterYSymmOptimized(result1, rate2) @@ -1264,15 +1264,15 @@ struct SimplifyCorrel2Max : public mlir::OpRewritePattern { // Pseudo-Code // Find pattern on DivOp -// %3 = "dsp.getRangeOfVector"(%0, %1, %2) : (tensor, tensor, tensor) -> tensor<*xf64> -// %4 = "dsp.fft1dreal"(%3) : (tensor<*xf64>) -> tensor<*xf64> -// %5 = "dsp.fft1dimg"(%3) : (tensor<*xf64>) -> tensor<*xf64> -// %6 = dsp.square(%4 : tensor<*xf64>) to tensor<*xf64> -// %7 = dsp.square(%5 : tensor<*xf64>) to tensor<*xf64> -// %8 = dsp.add %6, %7 : tensor<*xf64> -// %9 = dsp.sum(%8 : tensor<*xf64>) to tensor<*xf64> -// %10 = "dsp.len"(%3) : (tensor<*xf64>) -> tensor<*xf64> -// %11 = dsp.div %9, %10 : tensor<*xf64> +// %3 = "dsp.getRangeOfVector"(%0, %1, %2) : (tensor, tensor, tensor) -> tensor<*xf32> +// %4 = "dsp.fft1dreal"(%3) : (tensor<*xf32>) -> tensor<*xf32> +// %5 = "dsp.fft1dimg"(%3) : (tensor<*xf32>) -> tensor<*xf32> +// %6 = dsp.square(%4 : tensor<*xf32>) to tensor<*xf32> +// %7 = dsp.square(%5 : tensor<*xf32>) to tensor<*xf32> +// %8 = dsp.add %6, %7 : tensor<*xf32> +// %9 = dsp.sum(%8 : tensor<*xf32>) to tensor<*xf32> +// %10 = "dsp.len"(%3) : (tensor<*xf32>) -> tensor<*xf32> +// %11 = dsp.div %9, %10 : tensor<*xf32> // fft_real = fft1dreal(input) // sq1 = square(fft_real) // sq_abs = AddOp (sq1, square(fft_img)) // this is actually + sign